Searched refs:DMA1_5_IRQ_STATUS (Results 1 - 2 of 2) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-blackfin/mach-bf561/
H A DdefBF561.h415 #define DMA1_5_IRQ_STATUS 0xFFC01D68 /* DMA1 Channel 5 Interrupt/Status Register */ macro
H A DcdefBF561.h735 #define bfin_read_DMA1_5_IRQ_STATUS() bfin_read16(DMA1_5_IRQ_STATUS)
736 #define bfin_write_DMA1_5_IRQ_STATUS(val) bfin_write16(DMA1_5_IRQ_STATUS,val)

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