Searched refs:DCRN_SDRAM0_BASE (Results 1 - 6 of 6) sorted by relevance

/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/include/asm-ppc/
H A Dibm403.h437 #ifdef DCRN_SDRAM0_BASE
438 #define DCRN_SDRAM0_CFGADDR (DCRN_SDRAM0_BASE + 0x0) /* Mem Ctrlr Address */
439 #define DCRN_SDRAM0_CFGDATA (DCRN_SDRAM0_BASE + 0x1) /* Mem Ctrlr Data */
465 #ifdef DCRN_SDRAM0_BASE
466 #define DCRN_SDRAM0_CFGADDR (DCRN_SDRAM0_BASE + 0x0) /* Memory Controller Address */
467 #define DCRN_SDRAM0_CFGDATA (DCRN_SDRAM0_BASE + 0x1) /* Memory Controller Data */
H A Dibm405.h286 #ifdef DCRN_SDRAM0_BASE
287 #define DCRN_SDRAM0_CFGADDR (DCRN_SDRAM0_BASE + 0x0) /* Memory Controller Address */
288 #define DCRN_SDRAM0_CFGDATA (DCRN_SDRAM0_BASE + 0x1) /* Memory Controller Data */
/netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/arch/ppc/platforms/4xx/
H A Dibm405ep.h138 #define DCRN_SDRAM0_BASE 0x010 macro
H A Dibm405gp.h141 #define DCRN_SDRAM0_BASE 0x010 macro
H A Dibm405gpr.h141 #define DCRN_SDRAM0_BASE 0x010 macro
H A Dibmnp405h.h127 #define DCRN_SDRAM0_BASE 0x010 macro

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