Searched refs:CTRL1 (Results 1 - 6 of 6) sorted by relevance
| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/net/arm/ |
| H A D | am79c961a.h | 73 #define CTRL1 5 macro
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| H A D | am79c961a.c | 402 write_rreg(dev->base_addr, CTRL1, CTRL1_SPND);
407 while ((read_rreg(dev->base_addr, CTRL1) & CTRL1_SPND) == 0) {
429 write_rreg(dev->base_addr, CTRL1, 0);
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/net/ |
| H A D | amd8111e.h | 64 #define CTRL1 0x6C /* Control1 register */ macro
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| H A D | amd8111e.c | 463 reg_val = readl(mmio + CTRL1);
465 writel( reg_val| XMTSP_128 | CACHE_ALIGN, mmio + CTRL1 );
603 /* Set default value to CTRL1 Register */
604 writel(CTRL1_DEFAULT, mmio + CTRL1);
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| /netgear-WNDR4500-V1.0.1.40_1.0.68/src/linux/linux-2.6/drivers/net/ixgb/ |
| H A D | ixgb_hw.c | 295 IXGB_WRITE_REG_IO(hw, CTRL1, IXGB_CTRL1_EE_RST);
297 IXGB_WRITE_REG(hw, CTRL1, IXGB_CTRL1_EE_RST);
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| H A D | ixgb_ethtool.c | 290 *reg++ = IXGB_READ_REG(hw, CTRL1); /* 1 */
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