Searched refs:divider (Results 1 - 7 of 7) sorted by relevance

/netgear-R7800-V1.0.2.28/target/linux/mcs814x/files-3.3/arch/arm/mach-mcs814x/
H A Dclock.c34 unsigned long divider; /* clock divider */ member in struct:clk
43 if (clk->parent && clk->divider)
44 return clk_get_rate(clk->parent) / clk->divider;
105 .divider = 2,
116 .divider = 128,
/netgear-R7800-V1.0.2.28/package/qca-nss-drv/src/nss_hal/ipq806x/
H A Dnss_hal_pvt.h85 extern uint32_t nss_hal_pvt_divide_pll18(uint32_t core_id, uint32_t divider);
H A Dnss_hal_pvt.c291 uint32_t nss_hal_pvt_divide_pll18(uint32_t core_id, uint32_t divider) argument
337 if (divider == 1) {
356 } else if (divider == 2) {
378 } else if (divider == 5) {
570 * Enable NSS TCM clock root source and select divider 0.
/netgear-R7800-V1.0.2.28/target/linux/amazon/files/drivers/watchdog/
H A Damazon_wdt.c57 int reload_value, divider = 1; local
64 divider = 0;
83 amazon_writel(divider << 2, AMAZON_WDT_CON1);
/netgear-R7800-V1.0.2.28/target/linux/s3c24xx/files-2.6.30/drivers/leds/
H A Dleds-gta02-vibrator.c90 vp->pwm.divider = S3C2410_TCFG1_MUX3_DIV2;
/netgear-R7800-V1.0.2.28/target/linux/lantiq/files/arch/mips/lantiq/xway/
H A Dtimer.c31 * GPTC divider is set or not.
225 /* Set divider as 1, disable write protection for SPEN, enable module. */
242 /* Set divider as 0, enable write protection for SPEN, disable module. */
665 unsigned long divider; local
668 divider = lq_cal_divider(freq);
669 if (divider == 0)
671 flag = ((divider & ~0xFFFF) ? TIMER_FLAG_32BIT : TIMER_FLAG_16BIT)
677 printk(KERN_INFO "lq_set_timer(%d, %d), divider = %lu\n",
678 timer, freq, divider);
679 return lq_request_timer(timer, flag, divider, arg
[all...]
/netgear-R7800-V1.0.2.28/target/linux/s3c24xx/files-2.6.30/arch/arm/mach-s3c2442/
H A Dmach-gta02.c228 gta02_fiq_pwm_timer.divider = S3C2410_TCFG1_MUX3_DIV2;

Completed in 117 milliseconds