Searched refs:core_params (Results 1 - 14 of 14) sorted by relevance

/netgear-R7800-V1.0.2.28/target/linux/ramips/files/drivers/usb/dwc_otg/
H A Ddwc_otg_cil.c79 * base address of the DWC_otg controller registers. The core_params
84 * @param[in] core_params Pointer to the core configuration parameters
88 dwc_otg_core_params_t *core_params)
96 DWC_DEBUGPL(DBG_CILV, "%s(%p,%p)\n", __func__, reg_base_addr, core_params);
107 core_if->core_params = core_params;
348 (core_if->core_params->ulpi_fs_ls)) ||
349 (core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS)) {
375 (core_if->core_params->ulpi_fs_ls)) ||
376 (core_if->core_params
87 dwc_otg_cil_init(const uint32_t *reg_base_addr, dwc_otg_core_params_t *core_params) argument
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H A Ddwc_otg_hcd_queue.c106 hcd->core_if->core_params->max_transfer_size,
269 num_channels = hcd->core_if->core_params->host_channels;
301 if (hcd->core_if->core_params->speed == DWC_SPEED_PARAM_HIGH) {
343 max_channel_xfer_size = hcd->core_if->core_params->max_transfer_size;
H A Ddwc_otg_cil_intr.c210 if ((core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS) &&
211 (core_if->core_params->i2c_enable)) {
H A Ddwc_otg_pcd.c557 if (!GET_CORE_IF(pcd)->core_params->opt) {
658 uint32_t max_transfer = GET_CORE_IF(ep->pcd)->core_params->max_transfer_size;
1818 if ((GET_CORE_IF(pcd)->core_params->phy_type != DWC_PHY_TYPE_PARAM_FS) ||
1819 (!GET_CORE_IF(pcd)->core_params->i2c_enable)) {
1855 if ((core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS) &&
1856 (core_if->core_params->i2c_enable)) {
2243 if ((GET_CORE_IF(pcd)->core_params->speed == DWC_SPEED_PARAM_FULL) ||
2246 (GET_CORE_IF(pcd)->core_params->ulpi_fs_ls))) {
H A Ddwc_otg_hcd.c169 int num_channels = hcd->core_if->core_params->host_channels;
283 num_channels = dwc_otg_hcd->core_if->core_params->host_channels;
489 num_channels = dwc_otg_hcd->core_if->core_params->host_channels;
657 num_channels = hcd->core_if->core_params->host_channels;
878 int num_channels = hcd->core_if->core_params->host_channels;
2285 num_channels = hcd->core_if->core_params->host_channels;
2770 num_channels = hcd->core_if->core_params->host_channels;
H A Ddwc_otg_cil.h655 dwc_otg_core_params_t *core_params; member in struct:dwc_otg_core_if
H A Ddwc_otg_hcd_intr.c334 dwc_otg_core_params_t *params = dwc_otg_hcd->core_if->core_params;
437 for (i = 0; i < dwc_otg_hcd->core_if->core_params->host_channels; i++) {
H A Ddwc_otg_pcd_intr.c166 uint32_t max_transfer = GET_CORE_IF(ep->pcd)->core_params->max_transfer_size;
957 else if (GET_CORE_IF(pcd)->core_params->phy_utmi_width == 8) {
972 if (GET_CORE_IF(pcd)->core_params->phy_utmi_width == 16) {
1302 int32_t otg_cap_param = core_if->core_params->otg_cap;
/netgear-R7800-V1.0.2.28/target/linux/lantiq/files/drivers/usb/dwc_otg/
H A Ddwc_otg_cil.c75 * base address of the DWC_otg controller registers. The core_params
101 core_if->core_params = _core_params;
292 (_core_if->core_params->ulpi_fs_ls)) ||
293 (_core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS))
319 (_core_if->core_params->ulpi_fs_ls)) ||
320 (_core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS))
324 } else if (_core_if->core_params->speed == DWC_SPEED_PARAM_FULL) {
409 (_core_if->core_params->phy_ulpi_ext_vbus == DWC_PHY_ULPI_EXTERNAL_VBUS) ? 1 : 0;
412 usbcfg.b.term_sel_dl_pulse = (_core_if->core_params->ts_dline == 1) ? 1 : 0;
459 if ((_core_if->core_params
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H A Ddwc_otg_hcd.c153 int num_channels = _hcd->core_if->core_params->host_channels;
267 num_channels = dwc_otg_hcd->core_if->core_params->host_channels;
455 num_channels = dwc_otg_hcd->core_if->core_params->host_channels;
584 _hcd->available_host_channels = _hcd->core_if->core_params->host_channels;
595 num_channels = _hcd->core_if->core_params->host_channels;
818 int num_channels = _hcd->core_if->core_params->host_channels;
2223 num_channels = _hcd->core_if->core_params->host_channels;
2285 num_channels = _hcd->core_if->core_params->host_channels;
2787 num_channels = _hcd->core_if->core_params->host_channels;
H A Ddwc_otg_cil_intr.c212 if ((_core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS) &&
213 (_core_if->core_params->i2c_enable)) {
H A Ddwc_otg_cil.h552 dwc_otg_core_params_t *core_params; member in struct:dwc_otg_core_if
H A Ddwc_otg_hcd_queue.c392 max_channel_xfer_size = _hcd->core_if->core_params->max_transfer_size;
H A Ddwc_otg_hcd_intr.c330 dwc_otg_core_params_t *params = _dwc_otg_hcd->core_if->core_params;
440 for (i=0; i<_dwc_otg_hcd->core_if->core_params->host_channels; i++) {

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