Lines Matching refs:core_params
79 * base address of the DWC_otg controller registers. The core_params
84 * @param[in] core_params Pointer to the core configuration parameters
88 dwc_otg_core_params_t *core_params)
96 DWC_DEBUGPL(DBG_CILV, "%s(%p,%p)\n", __func__, reg_base_addr, core_params);
107 core_if->core_params = core_params;
348 (core_if->core_params->ulpi_fs_ls)) ||
349 (core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS)) {
375 (core_if->core_params->ulpi_fs_ls)) ||
376 (core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS)) {
380 else if (core_if->core_params->speed == DWC_SPEED_PARAM_FULL) {
475 (core_if->core_params->phy_ulpi_ext_vbus == DWC_PHY_ULPI_EXTERNAL_VBUS) ? 1 : 0;
478 usbcfg.b.term_sel_dl_pulse = (core_if->core_params->ts_dline == 1) ? 1 : 0;
520 if ((core_if->core_params->speed == DWC_SPEED_PARAM_FULL) &&
521 (core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS)) {
547 if (core_if->core_params->i2c_enable) {
572 usbcfg.b.ulpi_utmi_sel = core_if->core_params->phy_type;
576 usbcfg.b.ddrsel = core_if->core_params->phy_ulpi_ddr;
580 if (core_if->core_params->phy_utmi_width == 16) {
597 (core_if->core_params->ulpi_fs_ls)) {
624 ahbcfg.b.hburstlen = core_if->core_params->dma_burst_size;
625 core_if->dma_enable = (core_if->core_params->dma_enable != 0);
626 core_if->dma_desc_enable = (core_if->core_params->dma_desc_enable != 0);
632 core_if->dma_enable = (core_if->core_params->dma_enable != 0);
633 core_if->dma_desc_enable = (core_if->core_params->dma_desc_enable != 0);
642 core_if->pti_enh_enable = core_if->core_params->pti_enable != 0;
643 core_if->multiproc_int_enable = core_if->core_params->mpi_enable;
654 usbcfg.b.hnpcap = (core_if->core_params->otg_cap ==
656 usbcfg.b.srpcap = (core_if->core_params->otg_cap !=
662 usbcfg.b.srpcap = (core_if->core_params->otg_cap !=
673 usbcfg.b.srpcap = (core_if->core_params->otg_cap !=
684 usbcfg.b.srpcap = (core_if->core_params->otg_cap !=
798 dwc_otg_core_params_t *params = core_if->core_params;
1119 dwc_otg_core_params_t *params = core_if->core_params;
1137 if (core_if->core_params->speed == DWC_SPEED_PARAM_FULL)
1180 num_channels = core_if->core_params->host_channels;
1667 uint32_t max_hc_xfer_size = core_if->core_params->max_transfer_size;
1668 uint16_t max_hc_pkt_count = core_if->core_params->max_packet_count;
1802 core_if->core_params->max_transfer_size,
3327 for (i=0; i<core_if->core_params->host_channels; i++)