Searched refs:RMII_PIPE_RXCLK_SEL (Results 1 - 2 of 2) sorted by relevance

/netgear-R7800-V1.0.2.28/package/qca-ssdk/src/src/hsl/isisc/
H A Disisc_interface_ctrl.c592 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, RMII_PIPE_RXCLK_SEL, 1, reg);
596 SW_SET_REG_BY_FIELD(PORT0_PAD_CTRL, RMII_PIPE_RXCLK_SEL, 0, reg);
672 SW_GET_FIELD_BY_REG(PORT0_PAD_CTRL, RMII_PIPE_RXCLK_SEL, field, reg);
/netgear-R7800-V1.0.2.28/package/qca-ssdk/src/include/hsl/isisc/
H A Disisc_reg.h93 #define RMII_PIPE_RXCLK_SEL macro

Completed in 50 milliseconds