Searched refs:BIT3 (Results 1 - 14 of 14) sorted by relevance

/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/
H A DmvCtrlEnvAddrDec.h89 #define ATMWCR_WIN_DUNIT_CS3_MASK BIT3
124 #define ATMWCR_WIN_LUNIT_TYPE_MASK BIT3
138 #define ATMWCR_WIN_PEX_TYPE_MASK BIT3
/netgear-R7800-V1.0.2.28/target/linux/amazon/files/include/asm-mips/amazon/
H A Damazon_mei.h36 #define BIT3 1<<3 macro
92 #define MEI_TO_ARC_INT1 BIT3
103 #define ARC_TO_MEI_NO_ACCESS BIT3
114 #define NO_ACC_EN BIT3
/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/kw_family/ctrlEnv/sys/
H A DmvCpuIfRegs.h106 #define CCR_ENDIAN_INIT_MASK BIT3
211 #define CAMCIR_ARM_WD_TIMER_INT_REQ BIT3
234 #define CAMCIR_ARM_WD_TIMER_INT_REQ_MASK BIT3
H A DmvSysPex.h220 #define PXBIR_PREFETCH_EN BIT3 /* Prefetch Enable */
252 #define PXBR_PREFETCH_EN BIT3 /* Prefetch Enable */
/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pci-if/
H A DmvPciIfRegs.h106 #define PSCR_SPECIAL_EN BIT3 /* Special Cycle Enable */
184 #define PBBLR_PREFETCH_EN BIT3 /* Prefetch Enable */
/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/gpp/
H A DmvGppRegs.h71 #define MV_GPP3 BIT3
/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/twsi/
H A DmvTwsiSpec.h104 #define TWSI_CONTROL_INT_FLAG_SET BIT3
/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/ddr1_2/
H A DmvDram.c566 else if (pDimmInfo->dimmBankDensity & BIT3)
585 else if (pDimmInfo->dimmBankDensity & BIT3)
604 else if (pDimmInfo->dimmBankDensity & BIT3)
866 if (dimmInfo.burstLengthSupported & BIT3)
919 if (dimmInfo.suportedCasLatencies & BIT3)
930 if (dimmInfo.suportedCasLatencies & BIT3)
977 if (dimmInfo.dimmAttributes & BIT3)
1014 if (dimmInfo.dimmAttributes & BIT3)
1070 if ( spdRawData[i] & BIT3 )
1278 if (dimmInfo.dimmBankDensity & BIT3)
[all...]
/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/ddr2/spd/
H A DmvSpd.c561 else if (pDimmInfo->dimmBankDensity & BIT3)
580 else if (pDimmInfo->dimmBankDensity & BIT3)
599 else if (pDimmInfo->dimmBankDensity & BIT3)
861 if (dimmInfo.burstLengthSupported & BIT3)
914 if (dimmInfo.suportedCasLatencies & BIT3)
925 if (dimmInfo.suportedCasLatencies & BIT3)
972 if (dimmInfo.dimmAttributes & BIT3)
1009 if (dimmInfo.dimmAttributes & BIT3)
1065 if ( spdRawData[i] & BIT3 )
1273 if (dimmInfo.dimmBankDensity & BIT3)
[all...]
/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/mv_hal/pex/
H A DmvPexRegs.h147 #define PXICR_ERR_WRTO_REG_CAUSE BIT3 /* Erroneous write attempt to
624 #define PXDCSR_UR_REP_EN BIT3 /* Unsupported Request (UR)
689 #define PXLCSR_RCB_MASK BIT3
H A DmvPex.c115 /* BIT3 - TxBuf, extra drive for 1.0V termination */
120 regVal |= (BIT0 | BIT3);
126 regVal |= (BIT0 | BIT3);
/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/kw_family/boardEnv/
H A DmvBoardEnvSpec.h177 #define RD_88F6281A_OE_HIGH (BIT3 | BIT6 | BIT17)
H A DmvBoardEnvLib.c1103 MV_REG_BIT_RESET(ETH_PORT_SERIAL_CTRL_1_REG(0),BIT3);
1104 MV_REG_BIT_RESET(ETH_PORT_SERIAL_CTRL_1_REG(1),BIT3);
1111 MV_REG_BIT_RESET(ETH_PORT_SERIAL_CTRL_1_REG(1),BIT3);
/netgear-R7800-V1.0.2.28/target/linux/generic/files/crypto/ocf/kirkwood/mvHal/common/
H A DmvCommon.h134 #define BIT3 0x00000008 macro

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