1/******************************************************************************* 2Copyright (C) Marvell International Ltd. and its affiliates 3 4This software file (the "File") is owned and distributed by Marvell 5International Ltd. and/or its affiliates ("Marvell") under the following 6alternative licensing terms. Once you have made an election to distribute the 7File under one of the following license alternatives, please (i) delete this 8introductory statement regarding license alternatives, (ii) delete the two 9license alternatives that you have not elected to use and (iii) preserve the 10Marvell copyright notice above. 11 12******************************************************************************** 13Marvell Commercial License Option 14 15If you received this File from Marvell and you have entered into a commercial 16license agreement (a "Commercial License") with Marvell, the File is licensed 17to you under the terms of the applicable Commercial License. 18 19******************************************************************************** 20Marvell GPL License Option 21 22If you received this File from Marvell, you may opt to use, redistribute and/or 23modify this File in accordance with the terms and conditions of the General 24Public License Version 2, June 1991 (the "GPL License"), a copy of which is 25available along with the File in the license.txt file or by writing to the Free 26Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 or 27on the worldwide web at http://www.gnu.org/licenses/gpl.txt. 28 29THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED 30WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY 31DISCLAIMED. The GPL License provides additional details about this warranty 32disclaimer. 33******************************************************************************** 34Marvell BSD License Option 35 36If you received this File from Marvell, you may opt to use, redistribute and/or 37modify this File under the following licensing terms. 38Redistribution and use in source and binary forms, with or without modification, 39are permitted provided that the following conditions are met: 40 41 * Redistributions of source code must retain the above copyright notice, 42 this list of conditions and the following disclaimer. 43 44 * Redistributions in binary form must reproduce the above copyright 45 notice, this list of conditions and the following disclaimer in the 46 documentation and/or other materials provided with the distribution. 47 48 * Neither the name of Marvell nor the names of its contributors may be 49 used to endorse or promote products derived from this software without 50 specific prior written permission. 51 52THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND 53ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 54WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 55DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR 56ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 57(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 58LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 59ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 61SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 63*******************************************************************************/ 64 65 66#ifndef __INCmvBoardEnvSpech 67#define __INCmvBoardEnvSpech 68 69#include "mvSysHwConfig.h" 70 71 72/* For future use */ 73#define BD_ID_DATA_START_OFFS 0x0 74#define BD_DETECT_SEQ_OFFS 0x0 75#define BD_SYS_NUM_OFFS 0x4 76#define BD_NAME_OFFS 0x8 77 78/* I2C bus addresses */ 79#define MV_BOARD_CTRL_I2C_ADDR 0x0 /* Controller slave addr */ 80#define MV_BOARD_CTRL_I2C_ADDR_TYPE ADDR7_BIT 81#define MV_BOARD_DIMM0_I2C_ADDR 0x56 82#define MV_BOARD_DIMM0_I2C_ADDR_TYPE ADDR7_BIT 83#define MV_BOARD_DIMM1_I2C_ADDR 0x54 84#define MV_BOARD_DIMM1_I2C_ADDR_TYPE ADDR7_BIT 85#define MV_BOARD_EEPROM_I2C_ADDR 0x51 86#define MV_BOARD_EEPROM_I2C_ADDR_TYPE ADDR7_BIT 87#define MV_BOARD_MAIN_EEPROM_I2C_ADDR 0x50 88#define MV_BOARD_MAIN_EEPROM_I2C_ADDR_TYPE ADDR7_BIT 89#define MV_BOARD_MUX_I2C_ADDR_ENTRY 0x2 90#define MV_BOARD_DIMM_I2C_CHANNEL 0x0 91 92#define BOOT_FLASH_INDEX 0 93#define MAIN_FLASH_INDEX 1 94 95#define BOARD_ETH_START_PORT_NUM 0 96 97/* Supported clocks */ 98#define MV_BOARD_TCLK_100MHZ 100000000 99#define MV_BOARD_TCLK_125MHZ 125000000 100#define MV_BOARD_TCLK_133MHZ 133333333 101#define MV_BOARD_TCLK_150MHZ 150000000 102#define MV_BOARD_TCLK_166MHZ 166666667 103#define MV_BOARD_TCLK_200MHZ 200000000 104 105#define MV_BOARD_SYSCLK_100MHZ 100000000 106#define MV_BOARD_SYSCLK_125MHZ 125000000 107#define MV_BOARD_SYSCLK_133MHZ 133333333 108#define MV_BOARD_SYSCLK_150MHZ 150000000 109#define MV_BOARD_SYSCLK_166MHZ 166666667 110#define MV_BOARD_SYSCLK_200MHZ 200000000 111#define MV_BOARD_SYSCLK_233MHZ 233333333 112#define MV_BOARD_SYSCLK_250MHZ 250000000 113#define MV_BOARD_SYSCLK_267MHZ 266666667 114#define MV_BOARD_SYSCLK_300MHZ 300000000 115#define MV_BOARD_SYSCLK_333MHZ 333333334 116#define MV_BOARD_SYSCLK_400MHZ 400000000 117 118#define MV_BOARD_REFCLK_25MHZ 25000000 119 120/* Board specific */ 121/* =============================== */ 122 123/* boards ID numbers */ 124 125#define BOARD_ID_BASE 0x0 126 127/* New board ID numbers */ 128#define DB_88F6281A_BP_ID (BOARD_ID_BASE) 129#define DB_88F6281_BP_MLL_ID 1680 130#define RD_88F6281A_ID (BOARD_ID_BASE+0x1) 131#define RD_88F6281_MLL_ID 1682 132#define DB_88F6192A_BP_ID (BOARD_ID_BASE+0x2) 133#define RD_88F6192A_ID (BOARD_ID_BASE+0x3) 134#define RD_88F6192_MLL_ID 1681 135#define DB_88F6180A_BP_ID (BOARD_ID_BASE+0x4) 136#define DB_88F6190A_BP_ID (BOARD_ID_BASE+0x5) 137#define RD_88F6190A_ID (BOARD_ID_BASE+0x6) 138#define RD_88F6281A_PCAC_ID (BOARD_ID_BASE+0x7) 139#define DB_CUSTOMER_ID (BOARD_ID_BASE+0x8) 140#define SHEEVA_PLUG_ID (BOARD_ID_BASE+0x9) 141#define MV_MAX_BOARD_ID (SHEEVA_PLUG_ID + 1) 142 143/* DB-88F6281A-BP */ 144#if defined(MV_NAND) 145 #define DB_88F6281A_MPP0_7 0x21111111 146#else 147 #define DB_88F6281A_MPP0_7 0x21112220 148#endif 149#define DB_88F6281A_MPP8_15 0x11113311 150#define DB_88F6281A_MPP16_23 0x00551111 151#define DB_88F6281A_MPP24_31 0x00000000 152#define DB_88F6281A_MPP32_39 0x00000000 153#define DB_88F6281A_MPP40_47 0x00000000 154#define DB_88F6281A_MPP48_55 0x00000000 155#define DB_88F6281A_OE_LOW 0x0 156#if defined(MV_TDM_5CHANNELS) 157 #define DB_88F6281A_OE_HIGH (BIT6) 158#else 159#define DB_88F6281A_OE_HIGH 0x0 160#endif 161#define DB_88F6281A_OE_VAL_LOW 0x0 162#define DB_88F6281A_OE_VAL_HIGH 0x0 163 164/* RD-88F6281A */ 165#if defined(MV_NAND) 166 #define RD_88F6281A_MPP0_7 0x21111111 167#else 168 #define RD_88F6281A_MPP0_7 0x21112220 169#endif 170#define RD_88F6281A_MPP8_15 0x11113311 171#define RD_88F6281A_MPP16_23 0x33331111 172#define RD_88F6281A_MPP24_31 0x33003333 173#define RD_88F6281A_MPP32_39 0x20440533 174#define RD_88F6281A_MPP40_47 0x22202222 175#define RD_88F6281A_MPP48_55 0x00000002 176#define RD_88F6281A_OE_LOW (BIT28 | BIT29) 177#define RD_88F6281A_OE_HIGH (BIT3 | BIT6 | BIT17) 178#define RD_88F6281A_OE_VAL_LOW 0x0 179#define RD_88F6281A_OE_VAL_HIGH 0x0 180 181/* DB-88F6192A-BP */ 182#if defined(MV_NAND) 183 #define DB_88F6192A_MPP0_7 0x21111111 184#else 185 #define DB_88F6192A_MPP0_7 0x21112220 186#endif 187#define DB_88F6192A_MPP8_15 0x11113311 188#define DB_88F6192A_MPP16_23 0x00501111 189#define DB_88F6192A_MPP24_31 0x00000000 190#define DB_88F6192A_MPP32_35 0x00000000 191#define DB_88F6192A_OE_LOW (BIT22 | BIT23) 192#define DB_88F6192A_OE_HIGH 0x0 193#define DB_88F6192A_OE_VAL_LOW 0x0 194#define DB_88F6192A_OE_VAL_HIGH 0x0 195 196/* RD-88F6192A */ 197#define RD_88F6192A_MPP0_7 0x01222222 198#define RD_88F6192A_MPP8_15 0x00000011 199#define RD_88F6192A_MPP16_23 0x05550000 200#define RD_88F6192A_MPP24_31 0x0 201#define RD_88F6192A_MPP32_35 0x0 202#define RD_88F6192A_OE_LOW (BIT11 | BIT14 | BIT24 | BIT25 | BIT26 | BIT27 | BIT30 | BIT31) 203#define RD_88F6192A_OE_HIGH (BIT0 | BIT2) 204#define RD_88F6192A_OE_VAL_LOW 0x18400 205#define RD_88F6192A_OE_VAL_HIGH 0x8 206 207/* DB-88F6180A-BP */ 208#if defined(MV_NAND) 209 #define DB_88F6180A_MPP0_7 0x21111111 210#else 211 #define DB_88F6180A_MPP0_7 0x01112222 212#endif 213#define DB_88F6180A_MPP8_15 0x11113311 214#define DB_88F6180A_MPP16_23 0x00001111 215#define DB_88F6180A_MPP24_31 0x0 216#define DB_88F6180A_MPP32_39 0x4444c000 217#define DB_88F6180A_MPP40_44 0x00044444 218#define DB_88F6180A_OE_LOW 0x0 219#define DB_88F6180A_OE_HIGH 0x0 220#define DB_88F6180A_OE_VAL_LOW 0x0 221#define DB_88F6180A_OE_VAL_HIGH 0x0 222 223/* RD-88F6281A_PCAC */ 224#define RD_88F6281A_PCAC_MPP0_7 0x21111111 225#define RD_88F6281A_PCAC_MPP8_15 0x00003311 226#define RD_88F6281A_PCAC_MPP16_23 0x00001100 227#define RD_88F6281A_PCAC_MPP24_31 0x00000000 228#define RD_88F6281A_PCAC_MPP32_39 0x00000000 229#define RD_88F6281A_PCAC_MPP40_47 0x00000000 230#define RD_88F6281A_PCAC_MPP48_55 0x00000000 231#define RD_88F6281A_PCAC_OE_LOW 0x0 232#define RD_88F6281A_PCAC_OE_HIGH 0x0 233#define RD_88F6281A_PCAC_OE_VAL_LOW 0x0 234#define RD_88F6281A_PCAC_OE_VAL_HIGH 0x0 235 236/* SHEEVA PLUG */ 237#define RD_SHEEVA_PLUG_MPP0_7 0x01111111 238#define RD_SHEEVA_PLUG_MPP8_15 0x11113322 239#define RD_SHEEVA_PLUG_MPP16_23 0x00001111 240#define RD_SHEEVA_PLUG_MPP24_31 0x00100000 241#define RD_SHEEVA_PLUG_MPP32_39 0x00000000 242#define RD_SHEEVA_PLUG_MPP40_47 0x00000000 243#define RD_SHEEVA_PLUG_MPP48_55 0x00000000 244#define RD_SHEEVA_PLUG_OE_LOW 0x0 245#define RD_SHEEVA_PLUG_OE_HIGH 0x0 246#define RD_SHEEVA_PLUG_OE_VAL_LOW (BIT29) 247#define RD_SHEEVA_PLUG_OE_VAL_HIGH ((~(BIT17 | BIT16 | BIT15)) | BIT14) 248 249/* DB-CUSTOMER */ 250#define DB_CUSTOMER_MPP0_7 0x21111111 251#define DB_CUSTOMER_MPP8_15 0x00003311 252#define DB_CUSTOMER_MPP16_23 0x00001100 253#define DB_CUSTOMER_MPP24_31 0x00000000 254#define DB_CUSTOMER_MPP32_39 0x00000000 255#define DB_CUSTOMER_MPP40_47 0x00000000 256#define DB_CUSTOMER_MPP48_55 0x00000000 257#define DB_CUSTOMER_OE_LOW 0x0 258#define DB_CUSTOMER_OE_HIGH (~((BIT6) | (BIT7) | (BIT8) | (BIT9))) 259#define DB_CUSTOMER_OE_VAL_LOW 0x0 260#define DB_CUSTOMER_OE_VAL_HIGH 0x0 261 262#endif /* __INCmvBoardEnvSpech */ 263