Searched refs:sel_alt_clk (Results 1 - 2 of 2) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/crystalhd/
H A Dcrystalhd_hw.h151 uint32_t sel_alt_clk:1; /* When set, selects a 6.75MHz clock as the source of core_clk */ member in struct:link_misc_perst_clk_ctrl::__anon15157
H A Dcrystalhd_hw.c79 rst_clk_cntrl.sel_alt_clk = 0;
150 rst_clk_cntrl.sel_alt_clk = 1;

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