| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/radeon/ |
| H A D | radeon_display.c | 474 uint32_t post_div; local
504 min_post_div = max_post_div = pll->post_div;
511 for (post_div = min_post_div; post_div <= max_post_div; ++post_div) {
514 if ((pll->flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1))
519 if ((post_div == 5) ||
520 (post_div == 7) ||
521 (post_div == 9) ||
522 (post_div
634 calc_fb_div(struct radeon_pll *pll, uint32_t freq, uint32_t post_div, uint32_t ref_div, uint32_t *fb_div, uint32_t *fb_div_frac) argument
687 calc_fb_ref_div(struct radeon_pll *pll, uint32_t freq, uint32_t post_div, uint32_t *fb_div, uint32_t *fb_div_frac, uint32_t *ref_div) argument
742 u32 fb_div = 0, fb_div_frac = 0, post_div = 0, ref_div = 0; local
[all...] |
| H A D | radeon_clocks.c | 38 uint32_t fb_div, ref_div, post_div, sclk; local
53 post_div = RREG32_PLL(RADEON_SCLK_CNTL) & RADEON_SCLK_SRC_SEL_MASK;
54 if (post_div == 2)
56 else if (post_div == 3)
58 else if (post_div == 4)
68 uint32_t fb_div, ref_div, post_div, mclk; local
83 post_div = RREG32_PLL(RADEON_MCLK_CNTL) & 0x7;
84 if (post_div == 2)
86 else if (post_div == 3)
88 else if (post_div
341 calc_eng_mem_clock(struct radeon_device *rdev, uint32_t req_clock, int *fb_div, int *post_div) argument
384 int fb_div, post_div; local
[all...] |
| H A D | radeon_legacy_tv.c | 848 int post_div; local
850 case 1: post_div = 0; break;
851 case 2: post_div = 1; break;
852 case 3: post_div = 4; break;
853 case 4: post_div = 2; break;
854 case 6: post_div = 6; break;
855 case 8: post_div = 3; break;
856 case 12: post_div = 7; break;
858 default: post_div = 5; break;
860 return post_div;
[all...] |
| H A D | radeon_legacy_crtc.c | 687 } *post_div, post_divs[] = { local
757 for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
758 if (post_div->divider == post_divider)
762 if (!post_div->divider)
763 post_div = &post_divs[0];
772 pll_fb_post_div = (feedback_div | (post_div->bitvalue << 16));
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| H A D | atombios_crtc.c | 656 pll->post_div = args.v3.sOutput.ucPostDiv;
727 u32 post_div)
751 args.v1.ucPostDiv = post_div;
761 args.v2.ucPostDiv = post_div;
771 args.v3.ucPostDiv = post_div;
783 args.v5.ucPostDiv = post_div;
810 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; local
844 &ref_div, &post_div);
848 ref_div, fb_div, frac_fb_div, post_div);
718 atombios_crtc_program_pll(struct drm_crtc *crtc, int crtc_id, int pll_id, u32 encoder_mode, u32 encoder_id, u32 clock, u32 ref_div, u32 fb_div, u32 frac_fb_div, u32 post_div) argument
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| H A D | radeon_mode.h | 165 uint32_t post_div; member in struct:radeon_pll
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/aty/ |
| H A D | radeon_base.c | 1404 } *post_div, local
1460 for (post_div = &post_divs[0]; post_div->divider; ++post_div) {
1461 pll_output_freq = post_div->divider * freq;
1465 if (uses_dvo && (post_div->divider & 1))
1473 given by the terminal post_div->bitvalue */
1474 if ( !post_div->divider ) {
1475 post_div = &post_divs[post_div
[all...] |
| H A D | radeonfb.h | 232 int post_div; member in struct:radeon_regs
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/media/common/tuners/ |
| H A D | tda18271-priv.h | 191 u32 *freq, u8 *post_div, u8 *div);
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| H A D | tda18271-maps.c | 1069 u32 *freq, u8 *post_div, u8 *div)
1109 *post_div = map[i].pd;
1113 i, map_name, *post_div, *div);
1067 tda18271_lookup_pll_map(struct dvb_frontend *fe, enum tda18271_map_type map_type, u32 *freq, u8 *post_div, u8 *div) argument
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-davinci/ |
| H A D | tnetv107x.c | 69 u32 post_div; member in struct:sspll_regs
667 postdiv = __raw_readl(&sspll_regs[pll]->post_div) + 1;
|