Searched refs:pll_type (Results 1 - 6 of 6) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-s5p/include/plat/
H A Dpll.h31 enum pll45xx_type_t pll_type)
40 if (pll_type == pll_4508)
64 enum pll46xx_type_t pll_type)
77 if (pll_type == pll_4600) {
30 s5p_get_pll45xx(unsigned long baseclk, u32 pll_con, enum pll45xx_type_t pll_type) argument
62 s5p_get_pll46xx(unsigned long baseclk, u32 pll_con0, u32 pll_con1, enum pll46xx_type_t pll_type) argument
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/ssb/
H A Ddriver_mipscore.c209 u32 pll_type, n, m, rate = 0; local
212 ssb_extif_get_clockcontrol(&bus->extif, &pll_type, &n, &m);
214 ssb_chipco_get_clockcpu(&bus->chipco, &pll_type, &n, &m);
218 if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) {
221 rate = ssb_calc_clock_rate(pll_type, n, m);
224 if (pll_type == SSB_PLLTYPE_6) {
H A Ddriver_extif.c108 u32 *pll_type, u32 *n, u32 *m)
110 *pll_type = SSB_PLLTYPE_1;
107 ssb_extif_get_clockcontrol(struct ssb_extif *extif, u32 *pll_type, u32 *n, u32 *m) argument
/netgear-R7000-V1.0.7.12_1.2.5/src/shared/
H A Dhndmips.c344 uint32 pll_type, rate = 0; local
359 pll_type = sih->cccaps & CC_CAP_PLL_MASK;
361 if ((pll_type == PLL_TYPE2) ||
362 (pll_type == PLL_TYPE4) ||
363 (pll_type == PLL_TYPE6) ||
364 (pll_type == PLL_TYPE7))
366 else if (pll_type == PLL_TYPE5) {
369 } else if (pll_type == PLL_TYPE3) {
381 rate = si_clock_rate(pll_type, n, m);
383 if (pll_type
1201 uint32 pll_type, sync_mode; local
[all...]
H A Dsiutils.c2906 BCMINITFN(si_clock_rate)(uint32 pll_type, uint32 n, uint32 m) argument
2913 if (pll_type == PLL_TYPE6) {
2918 } else if ((pll_type == PLL_TYPE1) ||
2919 (pll_type == PLL_TYPE3) ||
2920 (pll_type == PLL_TYPE4) ||
2921 (pll_type == PLL_TYPE7)) {
2924 } else if (pll_type == PLL_TYPE2) {
2929 } else if (pll_type == PLL_TYPE5) {
2934 if ((pll_type == PLL_TYPE3) ||
2935 (pll_type
3076 uint32 pll_type, rate; local
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/src/include/
H A Dsiutils.h229 extern uint32 si_clock_rate(uint32 pll_type, uint32 n, uint32 m);

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