Searched refs:pll_reg (Results 1 - 5 of 5) sorted by relevance
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/mips/kernel/ |
H A D | csrc-powertv.c | 39 unsigned int pll_reg, m, n, p; local 44 pll_reg = asic_read(mips_pll_setup); 45 m = PLL_GET_M(pll_reg); 46 n = PLL_GET_N(pll_reg); 47 p = PLL_GET_P(pll_reg); 48 pr_info("MIPS PLL Register:0x%x M=%d N=%d P=%d\n", pll_reg, m, n, p);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-samsung/include/plat/ |
H A D | cpu-freq.h | 93 * @pll_reg: The PLL register setting for this PLL value. 97 unsigned long pll_reg; member in struct:s3c_pllval
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-s3c24xx/ |
H A D | cpu-freq.c | 42 static struct cpufreq_frequency_table *pll_reg; variable in typeref:struct:cpufreq_frequency_table 321 if (!pll_reg || cpu_cur.lock_pll) { 340 ret = cpufreq_frequency_table_target(&tmp_policy, pll_reg, 349 pll = pll_reg + index; 705 pll_reg = vals;
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/mfd/ |
H A D | sm501.c | 526 unsigned int pll_reg = 0; local 551 pll_reg = 0x20000 | (to.k << 15) | (to.n << 8) | to.m; 624 if (pll_reg) 625 writel(pll_reg, sm->regs + SM501_PROGRAMMABLE_PLL_CONTROL);
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/netgear-R7000-V1.0.7.12_1.2.5/src/shared/ |
H A D | hndpmu.c | 5567 uint32 pll_reg, mac_clk = 0; local 5580 pll_reg = si_pmu_pllcontrol(sih, PMU1_PLL0_PLLCTL1, 0, 0); 5582 mdiv2 = (pll_reg & PMU4335_PLL0_PC1_MDIV2_MASK) >> 7727 uint32 xf, ndiv_int, ndiv_frac, fvco, pll_reg, p1_div_scale; local 7740 pll_reg = si_pmu_pllcontrol(sih, PMU1_PLL0_PLLCTL2, 0, 0); 7742 p1_div = (pll_reg & PMU4335_PLL0_PC2_P1DIV_MASK) >> 7745 ndiv_int = (pll_reg & PMU4335_PLL0_PC2_NDIV_INT_MASK) >> 7748 pll_reg = si_pmu_pllcontrol(sih, PMU1_PLL0_PLLCTL3, 0, 0); 7750 ndiv_frac = (pll_reg & PMU1_PLL0_PC3_NDIV_FRAC_MASK) >>
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