Searched refs:pll1 (Results 1 - 4 of 4) sorted by relevance
| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-samsung/include/plat/ |
| H A D | pll6553x.h | 27 u32 pll0, u32 pll1)
36 kdiv = pll1 & PLL6553X_KDIV_MASK;
26 s3c_get_pll6553x(unsigned long baseclk, u32 pll0, u32 pll1) argument
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/avr32/boards/favr-32/ |
| H A D | setup.c | 265 struct clk *pll1; local
277 pll1 = clk_get(NULL, "pll1");
278 if (IS_ERR(pll1)) {
279 retval = PTR_ERR(pll1);
289 retval = clk_set_parent(pll1, osc1);
299 retval = clk_round_rate(pll1,
304 retval = clk_set_rate(pll1, retval);
308 retval = clk_set_parent(abdac, pll1);
315 clk_put(pll1);
[all...] |
| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/nouveau/ |
| H A D | nouveau_hw.c | 224 uint32_t pll1 = (oldpll1 & 0xfff80000) | pv->log2P << 16 | pv->NM1; local
231 /* model specific additions to generic pll1 and pll2 set up above */
233 pll1 = (pll1 & 0xfcc7ffff) | (pv->N2 & 0x18) << 21 |
248 pll1 = (pll1 & 0x7fffffff) | (single_stage ? 0x4 : 0xc) << 28;
250 if (oldpll1 == pll1 && oldpll2 == pll2)
284 NVWriteRAMDAC(dev, 0, reg1, pll1);
394 nouveau_hw_decode_pll(struct drm_device *dev, uint32_t reg1, uint32_t pll1, argument
402 pllvals->log2P = (pll1 >> 1
438 uint32_t reg1, pll1, pll2 = 0; local
[all...] |
| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/avr32/mach-at32ap/ |
| H A D | at32ap700x.c | 316 static struct clk pll1 = { variable in typeref:struct:clk
317 .name = "pll1",
572 if (parent == &osc1 || parent == &pll1)
579 if (parent == &pll0 || parent == &pll1)
599 parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1;
2201 &pll1,
2277 pll1.parent = &osc1;
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