Searched refs:pll (Results 1 - 25 of 120) sorted by relevance

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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/aty/
H A Dmach64_ct.c17 static int aty_valid_pll_ct (const struct fb_info *info, u32 vclk_per, struct pll_ct *pll);
18 static int aty_dsp_gt (const struct fb_info *info, u32 bpp, struct pll_ct *pll);
19 static int aty_var_to_pll_ct(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll);
20 static u32 aty_pll_to_var_ct(const struct fb_info *info, const union aty_pll *pll);
119 static int aty_dsp_gt(const struct fb_info *info, u32 bpp, struct pll_ct *pll) argument
126 multiplier = ((u32)pll->mclk_fb_div) * pll->vclk_post_div_real;
127 divider = ((u32)pll->vclk_fb_div) * pll->xclk_ref_div;
129 ras_multiplier = pll
208 aty_valid_pll_ct(const struct fb_info *info, u32 vclk_per, struct pll_ct *pll) argument
249 aty_var_to_pll_ct(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) argument
262 aty_pll_to_var_ct(const struct fb_info *info, const union aty_pll *pll) argument
279 aty_set_pll_ct(const struct fb_info *info, const union aty_pll *pll) argument
375 aty_get_pll_ct(const struct fb_info *info, union aty_pll *pll) argument
399 aty_init_pll_ct(const struct fb_info *info, union aty_pll *pll) argument
591 aty_resume_pll_ct(const struct fb_info *info, union aty_pll *pll) argument
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H A Dmach64_gx.c80 const union aty_pll *pll, u32 bpp, u32 accel)
123 u32 bpp, union aty_pll *pll)
149 pll->ibm514.m = RGB514_clocks[i].m;
150 pll->ibm514.n = RGB514_clocks[i].n;
157 const union aty_pll *pll)
162 df = pll->ibm514.m >> 6;
163 vco_div_count = pll->ibm514.m & 0x3f;
164 ref_div_count = pll->ibm514.n;
171 const union aty_pll *pll)
181 aty_st_514(0x20, pll
79 aty_set_dac_514(const struct fb_info *info, const union aty_pll *pll, u32 bpp, u32 accel) argument
122 aty_var_to_pll_514(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) argument
156 aty_pll_514_to_var(const struct fb_info *info, const union aty_pll *pll) argument
170 aty_set_pll_514(const struct fb_info *info, const union aty_pll *pll) argument
200 aty_set_dac_ATI68860_B(const struct fb_info *info, const union aty_pll *pll, u32 bpp, u32 accel) argument
283 aty_set_dac_ATT21C498(const struct fb_info *info, const union aty_pll *pll, u32 bpp, u32 accel) argument
336 aty_var_to_pll_18818(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) argument
395 aty_pll_18818_to_var(const struct fb_info *info, const union aty_pll *pll) argument
424 aty_set_pll18818(const struct fb_info *info, const union aty_pll *pll) argument
492 aty_var_to_pll_1703(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) argument
561 aty_pll_1703_to_var(const struct fb_info *info, const union aty_pll *pll) argument
567 aty_set_pll_1703(const struct fb_info *info, const union aty_pll *pll) argument
608 aty_var_to_pll_8398(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) argument
680 aty_pll_8398_to_var(const struct fb_info *info, const union aty_pll *pll) argument
686 aty_set_pll_8398(const struct fb_info *info, const union aty_pll *pll) argument
732 aty_var_to_pll_408(const struct fb_info *info, u32 vclk_per, u32 bpp, union aty_pll *pll) argument
798 aty_pll_408_to_var(const struct fb_info *info, const union aty_pll *pll) argument
804 aty_set_pll_408(const struct fb_info *info, const union aty_pll *pll) argument
879 aty_set_dac_unsupported(const struct fb_info *info, const union aty_pll *pll, u32 bpp, u32 accel) argument
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H A Datyfb.h136 union aty_pll pll; member in struct:atyfb_par
303 const union aty_pll * pll, u32 bpp, u32 accel);
318 int (*var_to_pll) (const struct fb_info * info, u32 vclk_per, u32 bpp, union aty_pll * pll);
319 u32 (*pll_to_var) (const struct fb_info * info, const union aty_pll * pll);
320 void (*set_pll) (const struct fb_info * info, const union aty_pll * pll);
321 void (*get_pll) (const struct fb_info *info, union aty_pll * pll);
322 int (*init_pll) (const struct fb_info * info, union aty_pll * pll);
323 void (*resume_pll)(const struct fb_info *info, union aty_pll *pll);
335 extern void aty_set_pll_ct(const struct fb_info *info, const union aty_pll *pll);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/video/matrox/
H A Dg450_pll.h7 unsigned int pll);
10 unsigned int pll);
H A Dmatroxfb_misc.h7 int matroxfb_PLL_calcclock(const struct matrox_pll_features* pll, unsigned int freq, unsigned int fmax,
14 return matroxfb_PLL_calcclock(&minfo->features.pll, freq, fmax, in, feed, post);
H A Dg450_pll.c35 return (minfo->features.pll.ref_freq * n + (m >> 1)) / m;
99 n = ((tvco * (m+1) + minfo->features.pll.ref_freq) / (minfo->features.pll.ref_freq * 2)) - 2;
137 unsigned int mnp, unsigned int pll)
139 switch (pll) {
174 unsigned int mnp, unsigned int pll)
180 switch (pll) {
230 unsigned int pll)
232 return g450_isplllocked(minfo, g450_setpll(minfo, mnp, pll));
235 static void updatehwstate_clk(struct matrox_hw_state* hw, unsigned int mnp, unsigned int pll) { argument
136 g450_setpll(const struct matrox_fb_info *minfo, unsigned int mnp, unsigned int pll) argument
173 g450_cmppll(const struct matrox_fb_info *minfo, unsigned int mnp, unsigned int pll) argument
229 g450_testpll(const struct matrox_fb_info *minfo, unsigned int mnp, unsigned int pll) argument
245 matroxfb_g450_setpll_cond(struct matrox_fb_info *minfo, unsigned int mnp, unsigned int pll) argument
253 g450_findworkingpll(struct matrox_fb_info *minfo, unsigned int pll, unsigned int *mnparray, unsigned int mnpcount) argument
331 __g450_setclk(struct matrox_fb_info *minfo, unsigned int fout, unsigned int pll, unsigned int *mnparray, unsigned int *deltaarray) argument
497 matroxfb_g450_setclk(struct matrox_fb_info *minfo, unsigned int fout, unsigned int pll) argument
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H A Dmatroxfb_misc.c128 int matroxfb_PLL_calcclock(const struct matrox_pll_features* pll, unsigned int freq, unsigned int fmax, argument
132 unsigned int fxtal = pll->ref_freq;
141 printk(KERN_ERR "post_shift_max: %d\n", pll->post_shift_max);
142 printk(KERN_ERR "ref_freq: %d\n", pll->ref_freq);
144 printk(KERN_ERR "vco_freq_min: %d\n", pll->vco_freq_min);
145 printk(KERN_ERR "in_div_min: %d\n", pll->in_div_min);
146 printk(KERN_ERR "in_div_max: %d\n", pll->in_div_max);
147 printk(KERN_ERR "feed_div_min: %d\n", pll->feed_div_min);
148 printk(KERN_ERR "feed_div_max: %d\n", pll->feed_div_max);
151 for (p = 1; p <= pll
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/nouveau/
H A Dnv50_calc.c31 nv50_calc_pll(struct drm_device *dev, struct pll_lims *pll, int clk, argument
37 ret = nouveau_calc_pll_mnp(dev, pll, clk, &pll_vals);
50 nv50_calc_pll2(struct drm_device *dev, struct pll_lims *pll, int clk, argument
55 *P = pll->vco1.maxfreq / clk;
56 if (*P > pll->max_p)
57 *P = pll->max_p;
58 if (*P < pll->min_p)
59 *P = pll->min_p;
61 /* *M = ceil(refclk / pll->vco.max_inputfreq); */
62 a.full = dfixed_const(pll
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/m68k/include/asm/
H A Drtc.h63 static inline int get_rtc_pll(struct rtc_pll_info *pll) argument
66 return mach_get_rtc_pll(pll);
70 static inline int set_rtc_pll(struct rtc_pll_info *pll) argument
73 return mach_set_rtc_pll(pll);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-davinci/
H A Dclock.c255 struct pll_data *pll; local
271 pll = clk->parent->pll_data;
275 rate = pll->input_rate;
280 v = __raw_readl(pll->base + clk->div_reg);
282 plldiv = (v & pll->div_ratio_mask) + 1;
302 struct pll_data *pll = clk->pll_data; local
305 ctrl = __raw_readl(pll->base + PLLCTL);
306 rate = pll->input_rate = clk->parent->rate;
310 mult = __raw_readl(pll->base + PLLM);
318 if (pll
369 davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, unsigned int mult, unsigned int postdiv) argument
461 struct pll_data *pll = clk->pll_data; local
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-msm/
H A Dacpuclock-arm11.c85 int pll; member in struct:clkctl_acpu_speed
278 unsigned int plls_enabled = 0, pll; local
299 while (tgt_s->pll != ACPU_PLL_TCXO && tgt_s->pll != cur_s->pll)
303 if (strt_s->pll != ACPU_PLL_TCXO)
304 plls_enabled |= 1 << strt_s->pll;
308 if (strt_s->pll != tgt_s->pll && tgt_s->pll !
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-ns9xxx/
H A Dprocessor-ns9360.c31 u32 pll = __raw_readl(SYS_PLL); local
32 return CRYSTAL * (REGGETIM(pll, SYS_PLL, ND) + 1)
33 >> REGGETIM(pll, SYS_PLL, FS);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/radeon/
H A Dradeon_display.c452 static void radeon_compute_pll_legacy(struct radeon_pll *pll, argument
460 uint32_t min_ref_div = pll->min_ref_div;
461 uint32_t max_ref_div = pll->max_ref_div;
462 uint32_t min_post_div = pll->min_post_div;
463 uint32_t max_post_div = pll->max_post_div;
466 uint32_t best_vco = pll->best_vco;
477 DRM_DEBUG_KMS("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div);
480 if (pll->flags & RADEON_PLL_IS_LCD) {
481 pll_out_min = pll
634 calc_fb_div(struct radeon_pll *pll, uint32_t freq, uint32_t post_div, uint32_t ref_div, uint32_t *fb_div, uint32_t *fb_div_frac) argument
687 calc_fb_ref_div(struct radeon_pll *pll, uint32_t freq, uint32_t post_div, uint32_t *fb_div, uint32_t *fb_div_frac, uint32_t *ref_div) argument
734 radeon_compute_pll_new(struct radeon_pll *pll, uint64_t freq, uint32_t *dot_clock_p, uint32_t *fb_div_p, uint32_t *frac_fb_div_p, uint32_t *ref_div_p, uint32_t *post_div_p) argument
820 radeon_compute_pll(struct radeon_pll *pll, uint64_t freq, uint32_t *dot_clock_p, uint32_t *fb_div_p, uint32_t *frac_fb_div_p, uint32_t *ref_div_p, uint32_t *post_div_p) argument
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/avr32/boards/atstk1000/
H A Datstk1003.c84 struct clk *pll; local
89 pll = clk_get(NULL, "pll0");
90 if (IS_ERR(pll))
93 if (clk_set_parent(gclk, pll)) {
102 clk_put(pll);
H A Datstk1004.c89 struct clk *pll; local
94 pll = clk_get(NULL, "pll0");
95 if (IS_ERR(pll))
98 if (clk_set_parent(gclk, pll)) {
107 clk_put(pll);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/m68k/q40/
H A Dconfig.c47 static int q40_get_rtc_pll(struct rtc_pll_info *pll);
48 static int q40_set_rtc_pll(struct rtc_pll_info *pll);
289 static int q40_get_rtc_pll(struct rtc_pll_info *pll) argument
293 pll->pll_value = tmp & Q40_RTC_PLL_MASK;
295 pll->pll_value = -pll->pll_value;
296 pll->pll_max = 31;
297 pll->pll_min = -31;
298 pll->pll_posmult = 512;
299 pll
305 q40_set_rtc_pll(struct rtc_pll_info *pll) argument
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/powerpc/include/asm/
H A Drtc.h68 static inline int get_rtc_pll(struct rtc_pll_info *pll) argument
72 static inline int set_rtc_pll(struct rtc_pll_info *pll) argument
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/x86/kernel/cpu/cpufreq/
H A Dcpufreq-nforce2.c65 * @pll: PLL value
69 static int nforce2_calc_fsb(int pll) argument
73 mul = (pll >> 8) & 0xff;
74 div = pll & 0xff;
114 * @pll: PLL value
118 static void nforce2_write_pll(int pll) argument
122 /* Set the pll addr. to 0x00 */
127 pci_write_config_dword(nforce2_dev, NFORCE2_PLLREG, pll);
176 int pll = 0; local
192 pll
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/char/
H A Dgenrtc.c269 struct rtc_pll_info pll; local
275 if (get_rtc_pll(&pll))
278 return copy_to_user(argp, &pll, sizeof pll) ? -EFAULT : 0;
283 if (copy_from_user(&pll, argp, sizeof(pll)))
285 return set_rtc_pll(&pll);
394 struct rtc_pll_info pll; local
444 if (!get_rtc_pll(&pll))
452 pll
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/media/video/bt8xx/
H A Dbttv-cards.c95 static unsigned int pll[BTTV_MAX] = { [ 0 ... (BTTV_MAX-1) ] = UNSET }; variable
117 module_param_array(pll, int, NULL, 0444);
130 MODULE_PARM_DESC(pll,"specify installed crystal (0=none, 28=28 MHz, 35=35 MHz)");
398 .pll = PLL_28,
467 .pll = PLL_28,
480 .pll = PLL_28,
494 .pll = PLL_28,
535 .pll = PLL_28,
551 .pll = PLL_28,
581 .pll
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-mxc/include/mach/
H A Dclock.h63 unsigned long mxc_decode_pll(unsigned int pll, u32 f_ref);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-s3c24xx/
H A Dcpu-freq.c75 cfg->pll.index = __raw_readl(S3C2410_MPLLCON);
76 cfg->pll.frequency = fclk;
86 unsigned long pll = cfg->pll.frequency; local
88 cfg->freq.fclk = pll;
89 cfg->freq.hclk = pll / cfg->divs.h_divisor;
90 cfg->freq.pclk = pll / cfg->divs.p_divisor;
108 pfx, cfg->pll.frequency, cfg->freq.fclk, cfg->freq.armclk,
162 struct cpufreq_frequency_table *pll)
174 cpu_new.pll
160 s3c_cpufreq_settarget(struct cpufreq_policy *policy, unsigned int target_freq, struct cpufreq_frequency_table *pll) argument
290 struct cpufreq_frequency_table *pll; local
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s3c2440/
H A DMakefile24 obj-$(CONFIG_S3C2440_PLL_12000000) += s3c2440-pll-12000000.o
25 obj-$(CONFIG_S3C2440_PLL_16934400) += s3c2440-pll-16934400.o
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/sound/soc/codecs/
H A Dak4671.c499 u8 pll; local
501 pll = snd_soc_read(codec, AK4671_PLL_MODE_SELECT0);
502 pll &= ~AK4671_PLL;
506 pll |= AK4671_PLL_11_2896MHZ;
509 pll |= AK4671_PLL_12MHZ;
512 pll |= AK4671_PLL_12_288MHZ;
515 pll |= AK4671_PLL_13MHZ;
518 pll |= AK4671_PLL_13_5MHZ;
521 pll |= AK4671_PLL_19_2MHZ;
524 pll |
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/cris/arch-v32/mach-a3/
H A Dcpufreq.c27 return clk_ctrl.pll ? 200000 : 6000;
53 clk_ctrl.pll = 1;
55 clk_ctrl.pll = 0;

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