Searched refs:iwl_write_direct32 (Results 1 - 10 of 10) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/wireless/iwlwifi/
H A Diwl-agn-ucode.c98 iwl_write_direct32(priv,
102 iwl_write_direct32(priv,
105 iwl_write_direct32(priv,
109 iwl_write_direct32(priv,
114 iwl_write_direct32(priv,
120 iwl_write_direct32(priv,
358 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
364 iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
374 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
446 iwl_write_direct32(pri
[all...]
H A Diwl-rx.c151 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
157 iwl_write_direct32(priv, rx_wrt_ptr_reg, q->write_actual);
H A Diwl-3945.c831 iwl_write_direct32(priv, FH39_RCSR_RBD_BASE(0), rxq->bd_dma);
832 iwl_write_direct32(priv, FH39_RCSR_RPTR_ADDR(0), rxq->rb_stts_dma);
833 iwl_write_direct32(priv, FH39_RCSR_WPTR(0), 0);
834 iwl_write_direct32(priv, FH39_RCSR_CONFIG(0),
867 iwl_write_direct32(priv, FH39_TSSR_CBB_BASE,
870 iwl_write_direct32(priv, FH39_TSSR_MSG_CONFIG,
1046 iwl_write_direct32(priv, FH39_RCSR_WPTR(0), rxq->write & ~7);
1089 iwl_write_direct32(priv, FH39_TCSR_CONFIG(txq_id), 0x0);
2215 iwl_write_direct32(priv, FH39_RCSR_CONFIG(0), 0);
2232 iwl_write_direct32(pri
[all...]
H A Diwl-agn-lib.c483 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
486 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
489 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
493 iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
504 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
766 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
H A Diwl-io.h339 static inline void iwl_write_direct32(struct iwl_priv *priv, u32 reg, u32 value) function
358 iwl_write_direct32(priv, reg, *values);
H A Diwl-agn-tx.c206 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
869 iwl_write_direct32(priv, FH_KW_MEM_ADDR_REG, priv->kw.dma >> 4);
907 iwl_write_direct32(priv, FH_KW_MEM_ADDR_REG, priv->kw.dma >> 4);
934 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0);
H A Diwl-4965.c466 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
538 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
544 iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
555 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
H A Diwl-tx.c67 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
H A Diwl-agn.c542 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
807 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
813 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
H A Diwl3945-base.c1747 iwl_write_direct32(priv, FH39_TCSR_CREDIT
1966 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
2013 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,

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