Searched refs:ddr2 (Results 1 - 6 of 6) sorted by relevance
| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/cris/arch-v32/mach-a3/ |
| H A D | dram_init.S | 25 ;; Refer to ddr2 MDS for initialization sequence
33 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_cfg), $r0
34 move.d REG_STATE(ddr2, rw_phy_cfg, en, yes), $r1
43 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_ctrl), $r0
44 move.d REG_STATE(ddr2, rw_phy_ctrl, rst, yes) | \
45 REG_STATE(ddr2, rw_phy_ctrl, cal_rst, yes), $r1
47 move.d REG_STATE(ddr2, rw_phy_ctrl, cal_start, yes), $r1
56 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_ctrl), $r0
74 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing), $r0
79 move.d REG_ADDR(ddr2, regi_ddr2_ctr
[all...] |
| H A D | hw_settings.S | 32 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_cfg)
34 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_latency)
36 .dword REG_ADDR(ddr2, regi_ddr2_ctrl, rw_timing)
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| H A D | cpufreq.c | 141 REG_RD(ddr2, regi_ddr2_ctrl, rw_cfg);
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/cris/include/arch-v32/mach-a3/mach/hwregs/ |
| H A D | clkgen_defs.h | 101 unsigned int ddr2 : 1; member in struct:__anon8689
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/cris/include/arch-v32/mach-a3/mach/ |
| H A D | startup.inc | 68 REG_STATE(clkgen, rw_clk_ctrl, ddr2, yes) | \
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| /netgear-R7000-V1.0.7.12_1.2.5/src/shared/ |
| H A D | aisdram.S | 219 * a3 = memory type (sdr,ddr1,ddr2)
361 and a3,t0,t1 # a3 == 4 if ddr2, 2 if ddr1, 1 if sdr.
365 /* Check chipc: chipstatus for the ddr1/ddr2 strapping option */
476 /* For ddr2, use DDR2M32X16X2 if QT and DDR2M128X16X2 otherwise */
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