Searched refs:d4clk1 (Results 1 - 2 of 2) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/octeon/
H A Dcvmx-spi.c474 if (stat.s.d4clk0 && stat.s.d4clk1 && clock_transitions) {
482 stat.s.d4clk1 = 0;
488 } while (stat.s.d4clk0 == 0 || stat.s.d4clk1 == 0);
H A Dcvmx-spxx-defs.h120 uint64_t d4clk1:1; member in struct:cvmx_spxx_clk_stat::cvmx_spxx_clk_stat_s

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