Searched refs:ctlreg (Results 1 - 6 of 6) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/input/touchscreen/
H A Dw90p910_ts.c76 unsigned long ctlreg; local
79 ctlreg = __raw_readl(w90p910_ts->ts_reg);
80 ctlreg &= ~(ADC_WAITTRIG | WT_INT | WT_INT_EN);
81 ctlreg |= ADC_SEMIAUTO | ADC_INT_EN | ADC_CONV;
82 __raw_writel(ctlreg, w90p910_ts->ts_reg);
89 unsigned long ctlreg; local
92 ctlreg = __raw_readl(w90p910_ts->ts_reg);
93 ctlreg &= ~(ADC_WAITTRIG | ADC_INT | WT_INT_EN);
94 ctlreg |= ADC_SEMIAUTO | ADC_INT_EN | ADC_CONV;
95 __raw_writel(ctlreg, w90p910_t
102 unsigned long ctlreg; local
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/alpha/kernel/
H A Dsys_takara.c141 unsigned int ctlreg = inl(0x500); local
144 ctlreg &= ~0x8000;
145 outl(ctlreg, 0x500);
148 ctlreg = 0x05107c00;
149 outl(ctlreg, 0x500);
233 unsigned int ctlreg = inl(0x500); local
243 && ((1<<(36-busslot)) & ctlreg)) {
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/mtd/nand/
H A Dr852.c345 dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND |
349 dev->ctlreg |= R852_CTL_DATA;
352 dev->ctlreg |= R852_CTL_COMMAND;
355 dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON);
357 dev->ctlreg &= ~R852_CTL_WRITE;
361 dev->ctlreg |= R852_CTL_WRITE;
363 r852_write_reg(dev, R852_CTL, dev->ctlreg);
368 if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) {
369 dev->ctlreg |= R852_CTL_WRITE;
370 r852_write_reg(dev, R852_CTL, dev->ctlreg);
[all...]
H A Dr852.h147 uint8_t ctlreg; /* cached contents of control reg */ member in struct:r852_device
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-mxc/include/mach/
H A Diomux-mxc91231.h95 #define IOMUX_PIN(side, gport, gpin, ctlreg, ctlfield, padgrp) \
99 ((ctlreg) << MUX_REG_SHIFT) | \
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/sound/oss/
H A Dvwsnd.c451 int ctlreg; member in struct:dma_chan_desc
600 li_writel(lith, desc->ctlreg, LI_CCTL_RESET);
642 DBGPV("ctlreg 0x%x = 0x%lx\n", desc->ctlreg, chan->ctlval);
646 li_writel(lith, desc->ctlreg, chan->ctlval);
659 DBGPV("ctlreg 0x%x = 0x%lx\n", chan->desc->ctlreg, chan->ctlval);
660 li_writel(lith, chan->desc->ctlreg, chan->ctlval);
687 li_writel(chan->lith, chan->desc->ctlreg, chan->ctlval);
697 DBGPV("ctlreg
[all...]

Completed in 114 milliseconds