Lines Matching refs:ctlreg
345 dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND |
349 dev->ctlreg |= R852_CTL_DATA;
352 dev->ctlreg |= R852_CTL_COMMAND;
355 dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON);
357 dev->ctlreg &= ~R852_CTL_WRITE;
361 dev->ctlreg |= R852_CTL_WRITE;
363 r852_write_reg(dev, R852_CTL, dev->ctlreg);
368 if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) {
369 dev->ctlreg |= R852_CTL_WRITE;
370 r852_write_reg(dev, R852_CTL, dev->ctlreg);
432 dev->ctlreg |= R852_CTL_ECC_ENABLE;
436 dev->ctlreg | R852_CTL_ECC_ACCESS);
439 r852_write_reg(dev, R852_CTL, dev->ctlreg);
444 dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
445 r852_write_reg(dev, R852_CTL, dev->ctlreg);
463 dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
464 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
477 r852_write_reg(dev, R852_CTL, dev->ctlreg);
502 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
504 r852_write_reg(dev, R852_CTL, dev->ctlreg);
1040 if (dev->ctlreg & R852_CTL_CARDENABLE)