Searched refs:clk_mask (Results 1 - 16 of 16) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/ia64/kernel/
H A Dfsyscall_gtod_data.h12 cycle_t clk_mask; member in struct:fsyscall_gtod_data_t
H A Dtime.c482 fsyscall_gtod_data.clk_mask = c->mask;
H A Dasm-offsets.c279 offsetof (struct fsyscall_gtod_data_t, clk_mask));
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/cris/include/asm/
H A Detraxgpio.h125 msb, data_mask[7:0] , clk_mask[7:0]
128 #define IO_CFG_WRITE_MODE_VALUE(msb, data_mask, clk_mask) \
129 ( (((msb)&1) << 16) | (((data_mask) &0xFF) << 8) | ((clk_mask) & 0xFF) )
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/cris/arch-v32/drivers/mach-a3/
H A Dgpio.c78 unsigned char clk_mask; member in struct:gpio_private
300 unsigned char clk_mask, unsigned char data_mask)
302 unsigned long shadow = readl(port) & ~clk_mask;
310 shadow |= clk_mask;
321 gpio_write_bit(port, data, i, priv->clk_mask,
325 gpio_write_bit(port, data, i, priv->clk_mask,
354 if (priv->clk_mask == 0 || priv->data_mask == 0)
359 count, priv->data_mask, priv->clk_mask, priv->write_msb));
393 priv->clk_mask = 0;
593 unsigned long dir_shadow, clk_mask, data_mas local
299 gpio_write_bit(unsigned long *port, unsigned char data, int bit, unsigned char clk_mask, unsigned char data_mask) argument
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/cris/arch-v32/drivers/mach-fs/
H A Dgpio.c77 unsigned char clk_mask; member in struct:gpio_private
343 unsigned char data, clk_mask, data_mask, write_msb; local
359 clk_mask = priv->clk_mask;
363 if (clk_mask == 0 || data_mask == 0)
367 "msb: %i\n", count, data_mask, clk_mask, write_msb));
377 *port = shadow &= ~clk_mask;
383 *port = shadow |= clk_mask;
390 *port = shadow &= ~clk_mask;
396 *port = shadow |= clk_mask;
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/cris/arch-v10/drivers/
H A Dgpio.c56 unsigned char clk_mask; member in struct:gpio_private
244 *priv->port = *priv->shadow &= ~(priv->clk_mask);
251 *priv->port = *priv->shadow |= priv->clk_mask;
283 if (priv->clk_mask == 0 || priv->data_mask == 0) {
290 count, priv->data_mask, priv->clk_mask, priv->write_msb));
339 priv->clk_mask = 0;
622 priv->clk_mask = arg & 0xFF;
628 if (!((priv->clk_mask & priv->changeable_bits) &&
630 (priv->clk_mask & *priv->dir_shadow) &&
633 priv->clk_mask
[all...]
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/sound/pci/ice1712/
H A Dak4xxx.c90 tmp &= ~priv->clk_mask;
101 tmp |= priv->clk_mask;
H A Drevo.c251 .clk_mask = VT1724_REVO_CCLK,
273 .clk_mask = VT1724_REVO_CCLK,
294 .clk_mask = VT1724_REVO_CCLK,
312 .clk_mask = VT1724_REVO_CCLK,
362 .clk_mask = VT1724_REVO_CCLK,
H A Ddelta.c439 .clk_mask = ICE1712_DELTA_AP_CCLK,
460 .clk_mask = ICE1712_DELTA_AP_CCLK,
482 .clk_mask = ICE1712_DELTA_1010LT_CCLK,
504 .clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK,
526 .clk_mask = ICE1712_VX442_CCLK,
H A Dhoontech.c286 .clk_mask = ICE1712_STDSP24_SERIAL_CLOCK,
H A Dews.c361 .clk_mask = ICE1712_EWS88_SERIAL_CLOCK,
382 .clk_mask = ICE1712_EWS88_SERIAL_CLOCK,
403 .clk_mask = ICE1712_6FIRE_SERIAL_CLOCK,
H A Dice1712.h264 unsigned int clk_mask; /* CLK gpio bit */ member in struct:snd_ak4xxx_private
H A Dphase.c116 .clk_mask = 1 << 5,
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/include/linux/
H A Dfs_enet_pd.h126 u32 clk_mask; member in struct:fs_platform_info
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/radeon/
H A Dradeon_combios.c484 u32 clk_mask,
573 if (clk_mask && data_mask) {
575 i2c.mask_clk_mask = clk_mask;
577 i2c.a_clk_mask = clk_mask;
579 i2c.en_clk_mask = clk_mask;
581 i2c.y_clk_mask = clk_mask;
482 combios_setup_i2c_bus(struct radeon_device *rdev, enum radeon_combios_ddc ddc, u32 clk_mask, u32 data_mask) argument

Completed in 213 milliseconds