Searched refs:baseclk (Results 1 - 7 of 7) sorted by relevance
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s3c64xx/include/mach/ |
H A D | pll.h | 25 static inline unsigned long s3c6400_get_pll(unsigned long baseclk, argument 29 u64 fvco = baseclk; 41 static inline unsigned long s3c6400_get_epll(unsigned long baseclk) argument 43 return s3c_get_pll6553x(baseclk, __raw_readl(S3C_EPLL_CON0),
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-s3c24xx/include/plat/ |
H A D | pll.h | 20 s3c24xx_get_pll(unsigned int pllval, unsigned int baseclk) argument 33 fvco = (uint64_t)baseclk * (mdiv + 8); 46 s3c2416_get_pll(unsigned int pllval, unsigned int baseclk) argument 58 fvco = (uint64_t)baseclk * m;
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-s5p/include/plat/ |
H A D | pll.h | 30 static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con, argument 34 u64 fvco = baseclk; 62 static inline unsigned long s5p_get_pll46xx(unsigned long baseclk, argument 75 tmp = baseclk; 99 static inline unsigned long s5p_get_pll90xx(unsigned long baseclk, argument 111 /* We need to multiple baseclk by mdiv (the integer part) and kdiv 118 tmp = baseclk; 133 static inline unsigned long s5p_get_pll65xx(unsigned long baseclk, u32 pll_con) argument 136 u64 fvco = baseclk;
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-samsung/include/plat/ |
H A D | pll6553x.h | 26 static inline unsigned long s3c_get_pll6553x(unsigned long baseclk, argument 38 /* We need to multiple baseclk by mdiv (the integer part) and kdiv 45 tmp = baseclk;
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-s3c2410/include/mach/ |
H A D | regs-s3c2443-clock.h | 124 s3c2443_get_mpll(unsigned int pllval, unsigned int baseclk) argument 137 fvco = (uint64_t)baseclk * (2 * (mdiv + 8)); 144 s3c2443_get_epll(unsigned int pllval, unsigned int baseclk) argument 157 fvco = (uint64_t)baseclk * (mdiv + 8);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/spi/ |
H A D | spi_txx9.c | 80 int baseclk; member in struct:txx9spi 198 int n = DIV_ROUND_UP(c->baseclk, speed_hz) - 1; 359 c->clk = clk_get(&dev->dev, "spi-baseclk"); 371 c->baseclk = clk_get_rate(c->clk); 372 c->min_speed_hz = DIV_ROUND_UP(c->baseclk, SPI_MAX_DIVIDER + 1); 373 c->max_speed_hz = c->baseclk / (SPI_MIN_DIVIDER + 1); 406 (c->baseclk + 500000) / 1000000);
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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/cris/include/asm/ |
H A D | etraxgpio.h | 227 unsigned int baseclk; /* The base clock to use, or sw will select one close*/ member in struct:gpio_pwmclk_conf 228 unsigned int low; /* The number of low periods of the baseclk */ 229 unsigned int high; /* The number of high periods of the baseclk */ 234 * baseclk = 12000000, low = 0, high = 0 236 * baseclk = 0, low = 0, high = 0, the values will be updated by driver.
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