Searched refs:UART1_REG (Results 1 - 4 of 4) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-kirkwood/
H A Dtsx1x-common.c92 #define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2)) macro
102 writel(0x83, UART1_REG(LCR));
103 writel(divisor & 0xff, UART1_REG(DLL));
104 writel((divisor >> 8) & 0xff, UART1_REG(DLM));
105 writel(0x03, UART1_REG(LCR));
106 writel(0x00, UART1_REG(IER));
107 writel(0x00, UART1_REG(FCR));
108 writel(0x00, UART1_REG(MCR));
111 writel('A', UART1_REG(TX));
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-orion5x/
H A Dtsx09-common.c25 #define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2)) macro
35 writel(0x83, UART1_REG(LCR));
36 writel(divisor & 0xff, UART1_REG(DLL));
37 writel((divisor >> 8) & 0xff, UART1_REG(DLM));
38 writel(0x03, UART1_REG(LCR));
39 writel(0x00, UART1_REG(IER));
40 writel(0x00, UART1_REG(FCR));
41 writel(0x00, UART1_REG(MCR));
44 writel('A', UART1_REG(TX));
H A Dkurobox_pro-setup.c185 #define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2)) macro
195 while (!(readl(UART1_REG(LSR)) & UART_LSR_DR)) {
203 buf[i] = readl(UART1_REG(RX));
215 while (!(readl(UART1_REG(LSR)) & UART_LSR_THRE))
217 writel(buf[i++], UART1_REG(TX));
301 writel(0x83, UART1_REG(LCR));
302 writel(divisor & 0xff, UART1_REG(DLL));
303 writel((divisor >> 8) & 0xff, UART1_REG(DLM));
304 writel(0x1b, UART1_REG(LCR));
305 writel(0x00, UART1_REG(IE
[all...]
H A Dterastation_pro2-setup.c165 #define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2)) macro
175 while (!(readl(UART1_REG(LSR)) & UART_LSR_DR)) {
183 buf[i] = readl(UART1_REG(RX));
195 while (!(readl(UART1_REG(LSR)) & UART_LSR_THRE))
197 writel(buf[i++], UART1_REG(TX));
281 writel(0x83, UART1_REG(LCR));
282 writel(divisor & 0xff, UART1_REG(DLL));
283 writel((divisor >> 8) & 0xff, UART1_REG(DLM));
284 writel(0x1b, UART1_REG(LCR));
285 writel(0x00, UART1_REG(IE
[all...]

Completed in 78 milliseconds