Searched refs:SIC_IWR1 (Results 1 - 13 of 13) sorted by relevance
| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf561/include/mach/ |
| H A D | blackfin.h | 28 #define SIC_IWR1 SICA_IWR1 macro
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-common/ |
| H A D | clocks-init.c | 46 # ifdef SIC_IWR1
47 /* BF52x system reset does not properly reset SIC_IWR1 which
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| H A D | pm.c | 41 # ifdef SIC_IWR1
42 /* BF52x system reset does not properly reset SIC_IWR1 which
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| H A D | dpmc_modes.S | 245 P1.H = hi(SIC_IWR1);
246 P1.L = lo(SIC_IWR1);
341 #ifdef SIC_IWR1
342 PM_SYS_PUSH(SIC_IWR1)
762 #ifdef SIC_IWR1
763 PM_SYS_POP(SIC_IWR1)
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| H A D | ints-priority.c | 1269 # ifdef SIC_IWR1
1270 /* BF52x/BF51x system reset does not properly reset SIC_IWR1 which
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/ |
| H A D | cdefBF51x_base.h | 78 #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
79 #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)
1072 iwr1 = bfin_read32(SIC_IWR1);
1075 bfin_write32(SIC_IWR1, 0);
1082 bfin_write32(SIC_IWR1, iwr1);
1097 iwr1 = bfin_read32(SIC_IWR1);
1100 bfin_write32(SIC_IWR1, 0);
1107 bfin_write32(SIC_IWR1, iwr1);
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| H A D | defBF51x_base.h | 43 #define SIC_IWR1 0xFFC00164 /* Interrupt Wakeup register */ macro
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/ |
| H A D | cdefBF52x_base.h | 78 #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
79 #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)
1124 iwr1 = bfin_read32(SIC_IWR1);
1127 bfin_write32(SIC_IWR1, 0);
1134 bfin_write32(SIC_IWR1, iwr1);
1149 iwr1 = bfin_read32(SIC_IWR1);
1152 bfin_write32(SIC_IWR1, 0);
1159 bfin_write32(SIC_IWR1, iwr1);
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| H A D | defBF52x_base.h | 46 #define SIC_IWR1 0xFFC00164 /* Interrupt Wakeup register */ macro
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/ |
| H A D | cdefBF538.h | 50 #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
51 #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)
52 #define bfin_read_SIC_IWR(x) bfin_read32(SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0))
53 #define bfin_write_SIC_IWR(x, val) bfin_write32(SIC_IWR0 + x * (SIC_IWR1 - SIC_IWR0), val)
2041 iwr1 = bfin_read32(SIC_IWR1);
2044 bfin_write32(SIC_IWR1, 0);
2051 bfin_write32(SIC_IWR1, iwr1);
2066 iwr1 = bfin_read32(SIC_IWR1);
2069 bfin_write32(SIC_IWR1, 0);
2076 bfin_write32(SIC_IWR1, iwr
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| H A D | defBF539.h | 44 #define SIC_IWR1 0xFFC00130 /* Interrupt Wakeup Register 1 */ macro
1478 /* Peripheral Masks For SIC_ISR1, SIC_IWR1, SIC_IMASK1 */
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/ |
| H A D | cdefBF54x_base.h | 63 #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
64 #define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)
2662 iwr1 = bfin_read32(SIC_IWR1);
2666 bfin_write32(SIC_IWR1, 0);
2674 bfin_write32(SIC_IWR1, iwr1);
2690 iwr1 = bfin_read32(SIC_IWR1);
2694 bfin_write32(SIC_IWR1, 0);
2702 bfin_write32(SIC_IWR1, iwr1);
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| H A D | defBF54x_base.h | 45 #define SIC_IWR1 0xffc00128 /* System Interrupt Wakeup Register 1 */ macro
1545 /* Bit masks for SIC_IWR1, SIC_IMASK1, SIC_ISR1 */
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