Searched refs:RREG32_MC (Results 1 - 6 of 6) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/gpu/drm/radeon/
H A Drs400.c67 tmp = RREG32_MC(RS480_GART_CACHE_CNTRL);
113 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH);
191 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH);
291 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH);
294 tmp = RREG32_MC(RS690_MCCFG_AGP_BASE);
296 tmp = RREG32_MC(RS690_MCCFG_AGP_BASE_2);
298 tmp = RREG32_MC(RS690_MCCFG_AGP_LOCATION);
300 tmp = RREG32_MC(0x100);
312 tmp = RREG32_MC(RS480_GART_BASE);
314 tmp = RREG32_MC(RS480_GART_FEATURE_I
[all...]
H A Drs600.c350 tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
354 tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
358 tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
361 tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
433 tmp = RREG32_MC(R_000100_MC_PT0_CNTL);
435 tmp = RREG32_MC(R_000009_MC_CNTL1);
448 tmp = RREG32_MC(R_000009_MC_CNTL1);
659 if (G_000000_MC_IDLE(RREG32_MC(R_000000_MC_STATUS)))
687 base = RREG32_MC(R_000004_MC_FB_LOCATION);
H A Dr520.c43 tmp = RREG32_MC(R520_MC_STATUS);
99 tmp = RREG32_MC(R520_MC_CNTL0);
H A Drs690.c41 tmp = RREG32_MC(R_000090_MC_SYSTEM_STATUS);
160 base = RREG32_MC(R_000100_MCCFG_FB_LOCATION);
419 tmp = RREG32_MC(R_000104_MC_INIT_MISC_LAT_TIMER);
H A Drv515.c131 tmp = RREG32_MC(MC_STATUS);
178 tmp = RREG32_MC(RV515_MC_CNTL) & MEM_NUM_CHANNELS_MASK;
1090 tmp = RREG32_MC(MC_MISC_LAT_TIMER);
H A Dradeon.h1180 #define RREG32_MC(reg) rdev->mc_rreg(rdev, (reg)) macro

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