Searched refs:PLLCR (Results 1 - 12 of 12) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/include/cpu-sh4/cpu/
H A Dfreq.h26 #define PLLCR 0xffc80024 macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7722.c35 #define PLLCR 0xa4150024 macro
56 if (__raw_readl(PLLCR) & 0x1000)
79 if (__raw_readl(PLLCR) & 0x4000)
260 if (__raw_readl(PLLCR) & 0x1000)
H A Dclock-sh7366.c32 #define PLLCR 0xa4150024 macro
56 if (__raw_readl(PLLCR) & 0x1000)
79 if (__raw_readl(PLLCR) & 0x4000)
275 if (__raw_readl(PLLCR) & 0x1000)
H A Dclock-sh7343.c32 #define PLLCR 0xa4150024 macro
56 if (__raw_readl(PLLCR) & 0x1000)
78 if (__raw_readl(PLLCR) & 0x4000)
286 if (__raw_readl(PLLCR) & 0x1000)
H A Dclock-sh7723.c36 #define PLLCR 0xa4150024 macro
57 if (__raw_readl(PLLCR) & 0x1000)
80 if (__raw_readl(PLLCR) & 0x4000)
336 if (__raw_readl(PLLCR) & 0x1000)
H A Dclock-sh7724.c37 #define PLLCR 0xa4150024 macro
61 if (__raw_readl(PLLCR) & 0x1000)
84 if (__raw_readl(PLLCR) & 0x4000)
362 if (__raw_readl(PLLCR) & 0x1000)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/m68knommu/platform/68360/
H A Dhead-ram.S49 #define PLLCR (_dprbase + REGB + 0x0010) define
135 move.w #MCU_SIM_PLLCR, PLLCR
H A Dhead-rom.S61 #define PLLCR (_dprbase + REGB + 0x0010) define
150 move.w #MCU_SIM_PLLCR, PLLCR
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/h8300/include/asm/
H A Dregs267x.h255 #define PLLCR 0xFFFF45 macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/m68k/include/asm/
H A DMC68328.h189 #define PLLCR WORD_REF(PLLCR_ADDR) macro
H A DMC68EZ328.h151 #define PLLCR WORD_REF(PLLCR_ADDR) macro
H A DMC68VZ328.h154 #define PLLCR WORD_REF(PLLCR_ADDR) macro

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