/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/msm/ |
H A D | mdp_ppp_v20.c | 185 MDP_OUTP(MDP_BASE + table[i].reg, table[i].val); 190 MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); 191 MDP_OUTP(MDP_BASE + 0x50200, 0x7fc00000); 192 MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); 193 MDP_OUTP(MDP_BASE + 0x50204, 0x7fc00000); 194 MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); 195 MDP_OUTP(MDP_BASE + 0x50208, 0x7fc00000); 196 MDP_OUTP(MDP_BASE + 0x5fffc, 0x0); 197 MDP_OUTP(MDP_BASE + 0x5020c, 0x7fc00000); 198 MDP_OUTP(MDP_BAS [all...] |
H A D | mdp_cursor.c | 55 MDP_OUTP(MDP_BASE + 0x9004c, (img->dy << 16) | img->dx); 75 MDP_OUTP(MDP_BASE + 0x90044, (img->height << 16) | img->width); 76 MDP_OUTP(MDP_BASE + 0x90048, mfd->cursor_buf_phys); 80 MDP_OUTP(MDP_BASE + 0x90060, 84 MDP_OUTP(MDP_BASE + 0x90064, (alpha << 24)); 85 MDP_OUTP(MDP_BASE + 0x90068, (0xffffff & img->bg_color)); 86 MDP_OUTP(MDP_BASE + 0x9006C, (0xffffff & img->bg_color)); 88 MDP_OUTP(MDP_BASE + 0x90064, 90 MDP_OUTP(MDP_BASE + 0x90068, 0); 96 MDP_OUTP(MDP_BAS [all...] |
H A D | mdp_dma_lcdc.c | 165 MDP_OUTP(MDP_BASE + dma_base + 0x8, (uint32) buf); 167 MDP_OUTP(MDP_BASE + dma_base + 0x4, ((fbi->var.yres) << 16) | 170 MDP_OUTP(MDP_BASE + dma_base + 0xc, fbi->fix.line_length); 172 MDP_OUTP(MDP_BASE + dma_base + 0x10, 0); 174 MDP_OUTP(MDP_BASE + dma_base, dma2_cfg_reg); 249 MDP_OUTP(MDP_BASE + timer_base + 0x4, hsync_ctrl); 250 MDP_OUTP(MDP_BASE + timer_base + 0x8, vsync_period); 251 MDP_OUTP(MDP_BASE + timer_base + 0xc, vsync_pulse_width * hsync_period); 253 MDP_OUTP(MDP_BASE + timer_base + 0x10, display_hctl); 254 MDP_OUTP(MDP_BAS [all...] |
H A D | mdp_dma_tv.c | 69 MDP_OUTP(MDP_BASE + 0xC0008, (uint32) buf >> 3); 73 MDP_OUTP(MDP_BASE + 0xC0004, 0x4c60674); /* flicker filter enabled */ 74 MDP_OUTP(MDP_BASE + 0xC0010, 0x20); /* sobel treshold */ 76 MDP_OUTP(MDP_BASE + 0xC0018, 0xeb0010); /* Y Max, Y min */ 77 MDP_OUTP(MDP_BASE + 0xC001C, 0xf00010); /* Cb Max, Cb min */ 78 MDP_OUTP(MDP_BASE + 0xC0020, 0xf00010); /* Cb Max, Cb min */ 80 MDP_OUTP(MDP_BASE + 0xC000C, 0x67686970); /* add a few chars for CC */ 81 MDP_OUTP(MDP_BASE + 0xC0000, 0x1); /* MDP tv out enable */ 101 MDP_OUTP(MDP_BASE + 0xC0000, 0x0); 128 MDP_OUTP(MDP_BAS [all...] |
H A D | mdp4_overlay_lcdc.c | 218 MDP_OUTP(MDP_BASE + LCDC_BASE + 0x4, hsync_ctrl); 219 MDP_OUTP(MDP_BASE + LCDC_BASE + 0x8, vsync_period); 220 MDP_OUTP(MDP_BASE + LCDC_BASE + 0xc, vsync_pulse_width * hsync_period); 221 MDP_OUTP(MDP_BASE + LCDC_BASE + 0x10, display_hctl); 222 MDP_OUTP(MDP_BASE + LCDC_BASE + 0x14, display_v_start); 223 MDP_OUTP(MDP_BASE + LCDC_BASE + 0x18, display_v_end); 224 MDP_OUTP(MDP_BASE + LCDC_BASE + 0x28, lcdc_border_clr); 225 MDP_OUTP(MDP_BASE + LCDC_BASE + 0x2c, lcdc_underflow_clr); 226 MDP_OUTP(MDP_BASE + LCDC_BASE + 0x30, lcdc_hsync_skew); 227 MDP_OUTP(MDP_BAS [all...] |
H A D | mdp_dma_s.c | 85 MDP_OUTP(MDP_BASE + 0xa0004, (iBuf->dma_h << 16 | iBuf->dma_w)); 86 MDP_OUTP(MDP_BASE + 0xa0008, src); /* ibuf address */ 87 MDP_OUTP(MDP_BASE + 0xa000c, iBuf->ibuf_width * outBpp);/* ystride */ 98 MDP_OUTP(MDP_BASE + 0xa0010, (iBuf->dma_y << 16) | iBuf->dma_x); 99 MDP_OUTP(MDP_BASE + 0x00090, 1); 100 MDP_OUTP(MDP_BASE + 0x00094, 109 MDP_OUTP(MDP_BASE + 0xa0000, dma_s_cfg_reg);
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H A D | mdp_ppp_v31.c | 212 MDP_OUTP(MDP_PPP_SCALE_COEFF_LSBn(index), val); 216 MDP_OUTP(MDP_PPP_SCALE_COEFF_MSBn(index), val); 493 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x013c, 495 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0140, 497 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0144, 499 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0148, 735 MDP_OUTP(MDP_BASE + 0x50020, 739 MDP_OUTP(MDP_BASE + 0x10230, ppp_scale_config); 757 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0200, (y << 16) | (x)); 758 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BAS [all...] |
H A D | mdp_dma.c | 148 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0184, 150 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0188, src); 151 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x018C, ystride); 153 MDP_OUTP(MDP_BASE + 0x90004, (iBuf->dma_h << 16 | iBuf->dma_w)); 154 MDP_OUTP(MDP_BASE + 0x90008, src); 155 MDP_OUTP(MDP_BASE + 0x9000c, ystride); 168 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0194, 170 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01a0, mddi_ld_param); 171 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01a4, 174 MDP_OUTP(MDP_BAS [all...] |
H A D | mdp_hw_init.c | 612 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0120, 0x0); 614 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x012c, 0x0); 616 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0130, 0x0); 618 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0134, 0x0); 619 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0158, 0x0); 620 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x15c, 0x0); 621 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0160, 0x0); 622 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0170, 0x0); 623 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0174, 0x0); 624 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BAS [all...] |
H A D | mdp_ppp.c | 513 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01c0, bg0_addr); 514 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01c4, bg1_addr); 516 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01cc, 518 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01d4, ppp_src_cfg_reg); 520 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x01d8, unpack_pattern); 981 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0240, 0); 997 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0240, 0x1e); 1094 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x0108, (iBuf->roi.height << 16 | 1096 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BASE + 0x010c, src0); /* comp.plane 0 */ 1097 MDP_OUTP(MDP_CMD_DEBUG_ACCESS_BAS [all...] |
H A D | mdp_vsync.c | 119 MDP_OUTP(MDP_BASE + MDP_SYNC_STATUS_0, vsync_load_cnt); 153 MDP_OUTP(MDP_BASE + MDP_SYNC_CFG_0, cfg); 222 MDP_OUTP(MDP_BASE + MDP_PRIM_VSYNC_INIT_VAL, 229 MDP_OUTP(MDP_BASE + MDP_PRIM_VSYNC_OUT_CTRL, 234 MDP_OUTP(MDP_BASE + 0x200,
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H A D | mdp.c | 146 MDP_OUTP(MDP_BASE + 0x94800 + 148 MDP_OUTP(MDP_BASE + 0x93800 + 194 MDP_OUTP(MDP_BASE + 0x90070, (mdp_lut_i << 10) | 0x17); 230 MDP_OUTP(MDP_BASE + 0x95004, hist->frame_cnt); 231 MDP_OUTP(MDP_BASE + 0x95000, 1); 233 MDP_OUTP(MDP_BASE + 0x94004, hist->frame_cnt); 234 MDP_OUTP(MDP_BASE + 0x94000, 1); 378 MDP_OUTP(MDP_BASE + 0x90070,
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H A D | mdp4_overlay_mddi.c | 97 MDP_OUTP(MDP_BASE + 0x00090, mddi_ld_param); 98 MDP_OUTP(MDP_BASE + 0x00094,
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H A D | mdp4_overlay.c | 81 MDP_OUTP(MDP_BASE + 0x90000, dma2_cfg_reg); 89 MDP_OUTP(MDP_BASE + 0x90004, 91 MDP_OUTP(MDP_BASE + 0x90008, pipe->srcp0_addr); 92 MDP_OUTP(MDP_BASE + 0x9000c, pipe->srcp0_ystride); 95 MDP_OUTP(MDP_BASE + 0x90010, (pipe->dst_y << 16 | pipe->dst_x));
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H A D | mdp.h | 96 #define MDP_OUTP(addr, data) mdp_ppp_outdw((uint32_t)(addr), \ macro 99 #define MDP_OUTP(addr, data) outpdw((addr), (data)) macro
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H A D | mdp4_util.c | 195 MDP_OUTP(MDP_BASE + 0x95010, 1); /* auto clear HIST */
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