| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/include/cpu-sh3/cpu/ |
| H A D | freq.h | 14 #define FRQCR 0xA415FF80 macro
16 #define FRQCR 0xffffff80 macro
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/include/cpu-sh4/cpu/ |
| H A D | freq.h | 15 #define FRQCR 0xa4150000 macro
24 #define FRQCR 0xffc80000 macro
29 #define FRQCR 0xffc80000 macro
37 #define FRQCR FRQCRA macro
57 #define FRQCR 0xffc00014 macro
59 #define FRQCR 0xffc00000 macro
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/kernel/cpu/sh3/ |
| H A D | clock-sh3.c | 8 * FRQCR parsing hacked out of arch/sh/kernel/time.c
31 int frqcr = __raw_readw(FRQCR);
43 int frqcr = __raw_readw(FRQCR);
55 int frqcr = __raw_readw(FRQCR);
67 int frqcr = __raw_readw(FRQCR);
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| H A D | clock-sh7705.c | 8 * FRQCR parsing hacked out of arch/sh/kernel/time.c
27 * FRQCR layout that is a bit different..
35 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003];
44 int idx = __raw_readw(FRQCR) & 0x0003;
54 int idx = (__raw_readw(FRQCR) & 0x0300) >> 8;
64 int idx = (__raw_readw(FRQCR) & 0x0030) >> 4;
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| H A D | clock-sh7706.c | 27 int frqcr = __raw_readw(FRQCR);
39 int frqcr = __raw_readw(FRQCR);
51 int frqcr = __raw_readw(FRQCR);
63 int frqcr = __raw_readw(FRQCR);
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| H A D | clock-sh7709.c | 27 int frqcr = __raw_readw(FRQCR);
39 int frqcr = __raw_readw(FRQCR);
51 int frqcr = __raw_readw(FRQCR);
64 int frqcr = __raw_readw(FRQCR);
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| H A D | clock-sh7710.c | 8 * FRQCR parsing hacked out of arch/sh/kernel/time.c
29 clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007];
38 int idx = (__raw_readw(FRQCR) & 0x0007);
48 int idx = (__raw_readw(FRQCR) & 0x0700) >> 8;
58 int idx = (__raw_readw(FRQCR) & 0x0070) >> 4;
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| H A D | clock-sh7712.c | 26 int frqcr = __raw_readw(FRQCR);
38 int frqcr = __raw_readw(FRQCR);
50 int frqcr = __raw_readw(FRQCR);
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/kernel/cpu/sh4/ |
| H A D | clock-sh4.c | 8 * FRQCR parsing hacked out of arch/sh/kernel/time.c
31 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007];
40 int idx = (__raw_readw(FRQCR) & 0x0007);
50 int idx = (__raw_readw(FRQCR) >> 3) & 0x0007;
60 int idx = (__raw_readw(FRQCR) >> 6) & 0x0007;
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/kernel/cpu/sh4a/ |
| H A D | clock-sh7770.c | 24 clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> 28) & 0x000f];
33 int idx = ((__raw_readl(FRQCR) >> 28) & 0x000f);
43 int idx = (__raw_readl(FRQCR) & 0x000f);
53 int idx = ((__raw_readl(FRQCR) >> 24) & 0x000f);
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| H A D | clock-sh7780.c | 27 clk->rate *= pfc_divisors[__raw_readl(FRQCR) & 0x0003];
36 int idx = (__raw_readl(FRQCR) & 0x0003);
46 int idx = ((__raw_readl(FRQCR) >> 16) & 0x0007);
56 int idx = ((__raw_readl(FRQCR) >> 24) & 0x0001);
79 int idx = ((__raw_readl(FRQCR) >> 20) & 0x0007);
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| H A D | clock-sh7763.c | 27 clk->rate *= p0fc_divisors[(__raw_readl(FRQCR) >> 4) & 0x07];
36 int idx = ((__raw_readl(FRQCR) >> 4) & 0x07);
46 int idx = ((__raw_readl(FRQCR) >> 16) & 0x07);
73 int idx = ((__raw_readl(FRQCR) >> 20) & 0x07);
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| H A D | clock-shx3.c | 37 clk->rate *= pfc_divisors[(__raw_readl(FRQCR) >> PFC_POS) & PFC_MSK];
46 int idx = ((__raw_readl(FRQCR) >> PFC_POS) & PFC_MSK);
56 int idx = ((__raw_readl(FRQCR) >> BFC_POS) & BFC_MSK);
66 int idx = ((__raw_readl(FRQCR) >> IFC_POS) & IFC_MSK);
89 int idx = ((__raw_readl(FRQCR) >> CFC_POS) & CFC_MSK);
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| H A D | clock-sh7757.c | 39 int idx = __raw_readl(FRQCR) & 0x0000000f;
49 int idx = (__raw_readl(FRQCR) >> 8) & 0x0000000f;
59 int idx = (__raw_readl(FRQCR) >> 20) & 0x0000000f;
82 int idx = (__raw_readl(FRQCR) >> 12) & 0x0000000f;
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| H A D | clock-sh7722.c | 30 #define FRQCR 0xa4150000 macro
80 mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1);
123 [DIV4_I] = DIV4(FRQCR, 20, 0x1fef, CLK_ENABLE_ON_INIT),
124 [DIV4_U] = DIV4(FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
125 [DIV4_SH] = DIV4(FRQCR, 12, 0x1fff, CLK_ENABLE_ON_INIT),
126 [DIV4_B] = DIV4(FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT),
127 [DIV4_B3] = DIV4(FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
128 [DIV4_P] = DIV4(FRQCR, 0, 0x1fff, 0),
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| H A D | clock-sh7366.c | 28 #define FRQCR 0xa4150000 macro
80 mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1);
124 [DIV4_I] = DIV4(FRQCR, 20, 0x1fef, CLK_ENABLE_ON_INIT),
125 [DIV4_U] = DIV4(FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
126 [DIV4_SH] = DIV4(FRQCR, 12, 0x1fff, CLK_ENABLE_ON_INIT),
127 [DIV4_B] = DIV4(FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT),
128 [DIV4_B3] = DIV4(FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
129 [DIV4_P] = DIV4(FRQCR, 0, 0x1fff, 0),
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| H A D | clock-sh7343.c | 28 #define FRQCR 0xa4150000 macro
79 mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1);
121 [DIV4_I] = DIV4(FRQCR, 20, 0x1fff, CLK_ENABLE_ON_INIT),
122 [DIV4_U] = DIV4(FRQCR, 16, 0x1fff, CLK_ENABLE_ON_INIT),
123 [DIV4_SH] = DIV4(FRQCR, 12, 0x1fff, CLK_ENABLE_ON_INIT),
124 [DIV4_B] = DIV4(FRQCR, 8, 0x1fff, CLK_ENABLE_ON_INIT),
125 [DIV4_B3] = DIV4(FRQCR, 4, 0x1fff, CLK_ENABLE_ON_INIT),
126 [DIV4_P] = DIV4(FRQCR, 0, 0x1fff, 0),
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| H A D | clock-sh7723.c | 31 #define FRQCR 0xa4150000 macro
81 mult = (((__raw_readl(FRQCR) >> 24) & 0x1f) + 1);
124 [DIV4_I] = DIV4(FRQCR, 20, 0x0dbf, CLK_ENABLE_ON_INIT),
125 [DIV4_U] = DIV4(FRQCR, 16, 0x0dbf, CLK_ENABLE_ON_INIT),
126 [DIV4_SH] = DIV4(FRQCR, 12, 0x0dbf, CLK_ENABLE_ON_INIT),
127 [DIV4_B] = DIV4(FRQCR, 8, 0x0dbf, CLK_ENABLE_ON_INIT),
128 [DIV4_B3] = DIV4(FRQCR, 4, 0x0db4, CLK_ENABLE_ON_INIT),
129 [DIV4_P] = DIV4(FRQCR, 0, 0x0dbf, 0),
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| /netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/sh/boards/mach-hp6xx/ |
| H A D | pm.c | 56 frqcr = __raw_readw(FRQCR);
58 __raw_writew(frqcr, FRQCR);
86 frqcr = __raw_readw(FRQCR);
88 __raw_writew(frqcr, FRQCR);
91 __raw_writew(frqcr, FRQCR);
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