Searched refs:DMA5_X_COUNT (Results 1 - 12 of 12) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h255 #define bfin_read_DMA5_X_COUNT() bfin_read16(DMA5_X_COUNT)
256 #define bfin_write_DMA5_X_COUNT(val) bfin_write16(DMA5_X_COUNT,val)
H A DdefBF532.h263 #define DMA5_X_COUNT 0xFFC00D50 /* DMA Channel 5 X Count Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF51x_base.h533 #define bfin_read_DMA5_X_COUNT() bfin_read16(DMA5_X_COUNT)
534 #define bfin_write_DMA5_X_COUNT(val) bfin_write16(DMA5_X_COUNT, val)
H A DdefBF51x_base.h299 #define DMA5_X_COUNT 0xFFC00D50 /* DMA Channel 5 X Count Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF52x_base.h550 #define bfin_read_DMA5_X_COUNT() bfin_read16(DMA5_X_COUNT)
551 #define bfin_write_DMA5_X_COUNT(val) bfin_write16(DMA5_X_COUNT, val)
H A DdefBF52x_base.h299 #define DMA5_X_COUNT 0xFFC00D50 /* DMA Channel 5 X Count Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h277 #define DMA5_X_COUNT 0xFFC00D50 /* DMA Channel 5 X Count Register */ macro
H A DcdefBF534.h511 #define bfin_read_DMA5_X_COUNT() bfin_read16(DMA5_X_COUNT)
512 #define bfin_write_DMA5_X_COUNT(val) bfin_write16(DMA5_X_COUNT,val)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h630 #define bfin_read_DMA5_X_COUNT() bfin_read16(DMA5_X_COUNT)
631 #define bfin_write_DMA5_X_COUNT(val) bfin_write16(DMA5_X_COUNT, val)
H A DdefBF539.h282 #define DMA5_X_COUNT 0xFFC00D50 /* DMA Channel 5 X Count Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h289 #define DMA5_X_COUNT 0xffc00d50 /* DMA Channel 5 X Count Register */ macro
H A DcdefBF54x_base.h462 #define bfin_read_DMA5_X_COUNT() bfin_read16(DMA5_X_COUNT)
463 #define bfin_write_DMA5_X_COUNT(val) bfin_write16(DMA5_X_COUNT, val)

Completed in 349 milliseconds