Searched refs:DMA5_START_ADDR (Results 1 - 12 of 12) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h253 #define bfin_read_DMA5_START_ADDR() bfin_read32(DMA5_START_ADDR)
254 #define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR,val)
H A DdefBF532.h262 #define DMA5_START_ADDR 0xFFC00D44 /* DMA Channel 5 Start Address Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF51x_base.h531 #define bfin_read_DMA5_START_ADDR() bfin_read32(DMA5_START_ADDR)
532 #define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR, val)
H A DdefBF51x_base.h297 #define DMA5_START_ADDR 0xFFC00D44 /* DMA Channel 5 Start Address Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF52x_base.h548 #define bfin_read_DMA5_START_ADDR() bfin_read32(DMA5_START_ADDR)
549 #define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR, val)
H A DdefBF52x_base.h297 #define DMA5_START_ADDR 0xFFC00D44 /* DMA Channel 5 Start Address Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h275 #define DMA5_START_ADDR 0xFFC00D44 /* DMA Channel 5 Start Address Register */ macro
H A DcdefBF534.h509 #define bfin_read_DMA5_START_ADDR() bfin_read32(DMA5_START_ADDR)
510 #define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR,val)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h626 #define bfin_read_DMA5_START_ADDR() bfin_readPTR(DMA5_START_ADDR)
627 #define bfin_write_DMA5_START_ADDR(val) bfin_writePTR(DMA5_START_ADDR, val)
H A DdefBF539.h280 #define DMA5_START_ADDR 0xFFC00D44 /* DMA Channel 5 Start Address Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h287 #define DMA5_START_ADDR 0xffc00d44 /* DMA Channel 5 Start Address Register */ macro
H A DcdefBF54x_base.h458 #define bfin_read_DMA5_START_ADDR() bfin_read32(DMA5_START_ADDR)
459 #define bfin_write_DMA5_START_ADDR(val) bfin_write32(DMA5_START_ADDR, val)

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