Searched refs:DMA5_CONFIG (Results 1 - 12 of 12) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h249 #define bfin_read_DMA5_CONFIG() bfin_read16(DMA5_CONFIG)
250 #define bfin_write_DMA5_CONFIG(val) bfin_write16(DMA5_CONFIG,val)
H A DdefBF532.h260 #define DMA5_CONFIG 0xFFC00D48 /* DMA Channel 5 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF51x_base.h527 #define bfin_read_DMA5_CONFIG() bfin_read16(DMA5_CONFIG)
528 #define bfin_write_DMA5_CONFIG(val) bfin_write16(DMA5_CONFIG, val)
H A DdefBF51x_base.h298 #define DMA5_CONFIG 0xFFC00D48 /* DMA Channel 5 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF52x_base.h544 #define bfin_read_DMA5_CONFIG() bfin_read16(DMA5_CONFIG)
545 #define bfin_write_DMA5_CONFIG(val) bfin_write16(DMA5_CONFIG, val)
H A DdefBF52x_base.h298 #define DMA5_CONFIG 0xFFC00D48 /* DMA Channel 5 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h276 #define DMA5_CONFIG 0xFFC00D48 /* DMA Channel 5 Configuration Register */ macro
H A DcdefBF534.h505 #define bfin_read_DMA5_CONFIG() bfin_read16(DMA5_CONFIG)
506 #define bfin_write_DMA5_CONFIG(val) bfin_write16(DMA5_CONFIG,val)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h628 #define bfin_read_DMA5_CONFIG() bfin_read16(DMA5_CONFIG)
629 #define bfin_write_DMA5_CONFIG(val) bfin_write16(DMA5_CONFIG, val)
H A DdefBF539.h281 #define DMA5_CONFIG 0xFFC00D48 /* DMA Channel 5 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h288 #define DMA5_CONFIG 0xffc00d48 /* DMA Channel 5 Configuration Register */ macro
H A DcdefBF54x_base.h460 #define bfin_read_DMA5_CONFIG() bfin_read16(DMA5_CONFIG)
461 #define bfin_write_DMA5_CONFIG(val) bfin_write16(DMA5_CONFIG, val)

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