Searched refs:DMA3_X_COUNT (Results 1 - 12 of 12) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h201 #define bfin_read_DMA3_X_COUNT() bfin_read16(DMA3_X_COUNT)
202 #define bfin_write_DMA3_X_COUNT(val) bfin_write16(DMA3_X_COUNT,val)
H A DdefBF532.h235 #define DMA3_X_COUNT 0xFFC00CD0 /* DMA Channel 3 X Count Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF51x_base.h479 #define bfin_read_DMA3_X_COUNT() bfin_read16(DMA3_X_COUNT)
480 #define bfin_write_DMA3_X_COUNT(val) bfin_write16(DMA3_X_COUNT, val)
H A DdefBF51x_base.h271 #define DMA3_X_COUNT 0xFFC00CD0 /* DMA Channel 3 X Count Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF52x_base.h496 #define bfin_read_DMA3_X_COUNT() bfin_read16(DMA3_X_COUNT)
497 #define bfin_write_DMA3_X_COUNT(val) bfin_write16(DMA3_X_COUNT, val)
H A DdefBF52x_base.h271 #define DMA3_X_COUNT 0xFFC00CD0 /* DMA Channel 3 X Count Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h249 #define DMA3_X_COUNT 0xFFC00CD0 /* DMA Channel 3 X Count Register */ macro
H A DcdefBF534.h457 #define bfin_read_DMA3_X_COUNT() bfin_read16(DMA3_X_COUNT)
458 #define bfin_write_DMA3_X_COUNT(val) bfin_write16(DMA3_X_COUNT,val)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h578 #define bfin_read_DMA3_X_COUNT() bfin_read16(DMA3_X_COUNT)
579 #define bfin_write_DMA3_X_COUNT(val) bfin_write16(DMA3_X_COUNT, val)
H A DdefBF539.h254 #define DMA3_X_COUNT 0xFFC00CD0 /* DMA Channel 3 X Count Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h257 #define DMA3_X_COUNT 0xffc00cd0 /* DMA Channel 3 X Count Register */ macro
H A DcdefBF54x_base.h404 #define bfin_read_DMA3_X_COUNT() bfin_read16(DMA3_X_COUNT)
405 #define bfin_write_DMA3_X_COUNT(val) bfin_write16(DMA3_X_COUNT, val)

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