Searched refs:DMA3_START_ADDR (Results 1 - 12 of 12) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h199 #define bfin_read_DMA3_START_ADDR() bfin_read32(DMA3_START_ADDR)
200 #define bfin_write_DMA3_START_ADDR(val) bfin_write32(DMA3_START_ADDR,val)
H A DdefBF532.h234 #define DMA3_START_ADDR 0xFFC00CC4 /* DMA Channel 3 Start Address Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF51x_base.h477 #define bfin_read_DMA3_START_ADDR() bfin_read32(DMA3_START_ADDR)
478 #define bfin_write_DMA3_START_ADDR(val) bfin_write32(DMA3_START_ADDR, val)
H A DdefBF51x_base.h269 #define DMA3_START_ADDR 0xFFC00CC4 /* DMA Channel 3 Start Address Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF52x_base.h494 #define bfin_read_DMA3_START_ADDR() bfin_read32(DMA3_START_ADDR)
495 #define bfin_write_DMA3_START_ADDR(val) bfin_write32(DMA3_START_ADDR, val)
H A DdefBF52x_base.h269 #define DMA3_START_ADDR 0xFFC00CC4 /* DMA Channel 3 Start Address Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h247 #define DMA3_START_ADDR 0xFFC00CC4 /* DMA Channel 3 Start Address Register */ macro
H A DcdefBF534.h455 #define bfin_read_DMA3_START_ADDR() bfin_read32(DMA3_START_ADDR)
456 #define bfin_write_DMA3_START_ADDR(val) bfin_write32(DMA3_START_ADDR,val)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h574 #define bfin_read_DMA3_START_ADDR() bfin_readPTR(DMA3_START_ADDR)
575 #define bfin_write_DMA3_START_ADDR(val) bfin_writePTR(DMA3_START_ADDR, val)
H A DdefBF539.h252 #define DMA3_START_ADDR 0xFFC00CC4 /* DMA Channel 3 Start Address Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h255 #define DMA3_START_ADDR 0xffc00cc4 /* DMA Channel 3 Start Address Register */ macro
H A DcdefBF54x_base.h400 #define bfin_read_DMA3_START_ADDR() bfin_read32(DMA3_START_ADDR)
401 #define bfin_write_DMA3_START_ADDR(val) bfin_write32(DMA3_START_ADDR, val)

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