Searched refs:DMA2_CONFIG (Results 1 - 12 of 12) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h168 #define bfin_read_DMA2_CONFIG() bfin_read16(DMA2_CONFIG)
169 #define bfin_write_DMA2_CONFIG(val) bfin_write16(DMA2_CONFIG,val)
H A DdefBF532.h218 #define DMA2_CONFIG 0xFFC00C88 /* DMA Channel 2 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF51x_base.h446 #define bfin_read_DMA2_CONFIG() bfin_read16(DMA2_CONFIG)
447 #define bfin_write_DMA2_CONFIG(val) bfin_write16(DMA2_CONFIG, val)
H A DdefBF51x_base.h256 #define DMA2_CONFIG 0xFFC00C88 /* DMA Channel 2 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF52x_base.h463 #define bfin_read_DMA2_CONFIG() bfin_read16(DMA2_CONFIG)
464 #define bfin_write_DMA2_CONFIG(val) bfin_write16(DMA2_CONFIG, val)
H A DdefBF52x_base.h256 #define DMA2_CONFIG 0xFFC00C88 /* DMA Channel 2 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h234 #define DMA2_CONFIG 0xFFC00C88 /* DMA Channel 2 Configuration Register */ macro
H A DcdefBF534.h424 #define bfin_read_DMA2_CONFIG() bfin_read16(DMA2_CONFIG)
425 #define bfin_write_DMA2_CONFIG(val) bfin_write16(DMA2_CONFIG,val)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h550 #define bfin_read_DMA2_CONFIG() bfin_read16(DMA2_CONFIG)
551 #define bfin_write_DMA2_CONFIG(val) bfin_write16(DMA2_CONFIG, val)
H A DdefBF539.h239 #define DMA2_CONFIG 0xFFC00C88 /* DMA Channel 2 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h240 #define DMA2_CONFIG 0xffc00c88 /* DMA Channel 2 Configuration Register */ macro
H A DcdefBF54x_base.h373 #define bfin_read_DMA2_CONFIG() bfin_read16(DMA2_CONFIG)
374 #define bfin_write_DMA2_CONFIG(val) bfin_write16(DMA2_CONFIG, val)

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