Searched refs:DMA1_X_COUNT (Results 1 - 12 of 12) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h147 #define bfin_read_DMA1_X_COUNT() bfin_read16(DMA1_X_COUNT)
148 #define bfin_write_DMA1_X_COUNT(val) bfin_write16(DMA1_X_COUNT,val)
H A DdefBF532.h207 #define DMA1_X_COUNT 0xFFC00C50 /* DMA Channel 1 X Count Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF51x_base.h425 #define bfin_read_DMA1_X_COUNT() bfin_read16(DMA1_X_COUNT)
426 #define bfin_write_DMA1_X_COUNT(val) bfin_write16(DMA1_X_COUNT, val)
H A DdefBF51x_base.h243 #define DMA1_X_COUNT 0xFFC00C50 /* DMA Channel 1 X Count Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF52x_base.h442 #define bfin_read_DMA1_X_COUNT() bfin_read16(DMA1_X_COUNT)
443 #define bfin_write_DMA1_X_COUNT(val) bfin_write16(DMA1_X_COUNT, val)
H A DdefBF52x_base.h243 #define DMA1_X_COUNT 0xFFC00C50 /* DMA Channel 1 X Count Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h221 #define DMA1_X_COUNT 0xFFC00C50 /* DMA Channel 1 X Count Register */ macro
H A DcdefBF534.h403 #define bfin_read_DMA1_X_COUNT() bfin_read16(DMA1_X_COUNT)
404 #define bfin_write_DMA1_X_COUNT(val) bfin_write16(DMA1_X_COUNT,val)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h526 #define bfin_read_DMA1_X_COUNT() bfin_read16(DMA1_X_COUNT)
527 #define bfin_write_DMA1_X_COUNT(val) bfin_write16(DMA1_X_COUNT, val)
H A DdefBF539.h226 #define DMA1_X_COUNT 0xFFC00C50 /* DMA Channel 1 X Count Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h225 #define DMA1_X_COUNT 0xffc00c50 /* DMA Channel 1 X Count Register */ macro
H A DcdefBF54x_base.h346 #define bfin_read_DMA1_X_COUNT() bfin_read16(DMA1_X_COUNT)
347 #define bfin_write_DMA1_X_COUNT(val) bfin_write16(DMA1_X_COUNT, val)

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