Searched refs:DMA1_START_ADDR (Results 1 - 12 of 12) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h145 #define bfin_read_DMA1_START_ADDR() bfin_read32(DMA1_START_ADDR)
146 #define bfin_write_DMA1_START_ADDR(val) bfin_write32(DMA1_START_ADDR,val)
H A DdefBF532.h206 #define DMA1_START_ADDR 0xFFC00C44 /* DMA Channel 1 Start Address Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF51x_base.h423 #define bfin_read_DMA1_START_ADDR() bfin_read32(DMA1_START_ADDR)
424 #define bfin_write_DMA1_START_ADDR(val) bfin_write32(DMA1_START_ADDR, val)
H A DdefBF51x_base.h241 #define DMA1_START_ADDR 0xFFC00C44 /* DMA Channel 1 Start Address Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF52x_base.h440 #define bfin_read_DMA1_START_ADDR() bfin_read32(DMA1_START_ADDR)
441 #define bfin_write_DMA1_START_ADDR(val) bfin_write32(DMA1_START_ADDR, val)
H A DdefBF52x_base.h241 #define DMA1_START_ADDR 0xFFC00C44 /* DMA Channel 1 Start Address Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h219 #define DMA1_START_ADDR 0xFFC00C44 /* DMA Channel 1 Start Address Register */ macro
H A DcdefBF534.h401 #define bfin_read_DMA1_START_ADDR() bfin_read32(DMA1_START_ADDR)
402 #define bfin_write_DMA1_START_ADDR(val) bfin_write32(DMA1_START_ADDR,val)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h522 #define bfin_read_DMA1_START_ADDR() bfin_readPTR(DMA1_START_ADDR)
523 #define bfin_write_DMA1_START_ADDR(val) bfin_writePTR(DMA1_START_ADDR, val)
H A DdefBF539.h224 #define DMA1_START_ADDR 0xFFC00C44 /* DMA Channel 1 Start Address Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h223 #define DMA1_START_ADDR 0xffc00c44 /* DMA Channel 1 Start Address Register */ macro
H A DcdefBF54x_base.h342 #define bfin_read_DMA1_START_ADDR() bfin_read32(DMA1_START_ADDR)
343 #define bfin_write_DMA1_START_ADDR(val) bfin_write32(DMA1_START_ADDR, val)

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