Searched refs:DMA1_CONFIG (Results 1 - 12 of 12) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h141 #define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)
142 #define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG,val)
H A DdefBF532.h204 #define DMA1_CONFIG 0xFFC00C48 /* DMA Channel 1 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF51x_base.h419 #define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)
420 #define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG, val)
H A DdefBF51x_base.h242 #define DMA1_CONFIG 0xFFC00C48 /* DMA Channel 1 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF52x_base.h436 #define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)
437 #define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG, val)
H A DdefBF52x_base.h242 #define DMA1_CONFIG 0xFFC00C48 /* DMA Channel 1 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h220 #define DMA1_CONFIG 0xFFC00C48 /* DMA Channel 1 Configuration Register */ macro
H A DcdefBF534.h397 #define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)
398 #define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG,val)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h524 #define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)
525 #define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG, val)
H A DdefBF539.h225 #define DMA1_CONFIG 0xFFC00C48 /* DMA Channel 1 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h224 #define DMA1_CONFIG 0xffc00c48 /* DMA Channel 1 Configuration Register */ macro
H A DcdefBF54x_base.h344 #define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)
345 #define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG, val)

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