Searched refs:DMA0_CONFIG (Results 1 - 12 of 12) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h114 #define bfin_read_DMA0_CONFIG() bfin_read16(DMA0_CONFIG)
115 #define bfin_write_DMA0_CONFIG(val) bfin_write16(DMA0_CONFIG,val)
H A DdefBF532.h190 #define DMA0_CONFIG 0xFFC00C08 /* DMA Channel 0 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF51x_base.h392 #define bfin_read_DMA0_CONFIG() bfin_read16(DMA0_CONFIG)
393 #define bfin_write_DMA0_CONFIG(val) bfin_write16(DMA0_CONFIG, val)
H A DdefBF51x_base.h228 #define DMA0_CONFIG 0xFFC00C08 /* DMA Channel 0 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF52x_base.h409 #define bfin_read_DMA0_CONFIG() bfin_read16(DMA0_CONFIG)
410 #define bfin_write_DMA0_CONFIG(val) bfin_write16(DMA0_CONFIG, val)
H A DdefBF52x_base.h228 #define DMA0_CONFIG 0xFFC00C08 /* DMA Channel 0 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h206 #define DMA0_CONFIG 0xFFC00C08 /* DMA Channel 0 Configuration Register */ macro
H A DcdefBF534.h370 #define bfin_read_DMA0_CONFIG() bfin_read16(DMA0_CONFIG)
371 #define bfin_write_DMA0_CONFIG(val) bfin_write16(DMA0_CONFIG,val)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h498 #define bfin_read_DMA0_CONFIG() bfin_read16(DMA0_CONFIG)
499 #define bfin_write_DMA0_CONFIG(val) bfin_write16(DMA0_CONFIG, val)
H A DdefBF539.h211 #define DMA0_CONFIG 0xFFC00C08 /* DMA Channel 0 Configuration Register */ macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h208 #define DMA0_CONFIG 0xffc00c08 /* DMA Channel 0 Configuration Register */ macro
H A DcdefBF54x_base.h315 #define bfin_read_DMA0_CONFIG() bfin_read16(DMA0_CONFIG)
316 #define bfin_write_DMA0_CONFIG(val) bfin_write16(DMA0_CONFIG, val)

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