Searched refs:DCMD (Results 1 - 8 of 8) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-pxa/include/plat/
H A Ddma.h12 #define DCMD(n) DMAC_REG(0x020c + ((n) << 4)) macro
63 volatile u32 dcmd; /* DCMD value for the current transfer */
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/sound/arm/
H A Dpxa2xx-pcm-lib.c145 DCMD(prtd->dma_ch) = 0;
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/spi/
H A Dpxa2xx_spi.c548 (DCMD(drv_data->rx_channel) & DCMD_LENGTH);
1048 DCMD(drv_data->rx_channel) = DCMD_FLOWSRC
1053 DCMD(drv_data->rx_channel) = DCMD_INCTRGADDR
1065 DCMD(drv_data->tx_channel) = DCMD_FLOWTRG
1070 DCMD(drv_data->tx_channel) = DCMD_INCSRCADDR
1078 DCMD(drv_data->tx_channel) |= DCMD_ENDIRQEN;
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/plat-pxa/
H A Ddma.c142 dcmd = DCMD(chan);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/irda/
H A Dpxaficp_ir.c154 DCMD(si->rxdma) = DCMD_INCTRGADDR | DCMD_FLOWSRC | DCMD_WIDTH1 | DCMD_BURST32 | IRDA_FRAME_SIZE_LIMIT;
163 DCMD(si->txdma) = DCMD_INCSRCADDR | DCMD_FLOWTRG | DCMD_ENDIRQEN | DCMD_WIDTH1 | DCMD_BURST32 | si->dma_tx_buff_len;
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/
H A Dsmc911x.h265 DCMD(dma) = (DCMD_INCTRGADDR | DCMD_BURST32 |
293 DCMD(dma) = (DCMD_INCSRCADDR | DCMD_BURST32 |
H A Dsmc91x.h457 DCMD(dma) = (DCMD_INCTRGADDR | DCMD_BURST32 |
496 DCMD(dma) = (DCMD_INCTRGADDR | DCMD_BURST32 |
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/char/
H A Dsynclinkmp.c381 #define DCMD 0x95 macro
2247 write_reg(info, TXDMA + DCMD, SWABORT); /* reset/init DMA channel */
2399 write_reg(info, TXDMA + DCMD, SWABORT); /* reset/init DMA channel */
3011 write_reg(info, TXDMA + DCMD, SWABORT); /* reset/init DMA channel */
4137 write_reg(info, RXDMA + DCMD, SWABORT); /* reset/init Rx DMA */
4163 write_reg(info, RXDMA + DCMD, SWABORT); /* reset/init Rx DMA */
4238 write_reg(info, TXDMA + DCMD, SWABORT); /* reset/init DMA channel */
4282 write_reg(info, TXDMA + DCMD, SWABORT); /* reset/init DMA channel */

Completed in 149 milliseconds