Searched refs:CSR0_STOP (Results 1 - 7 of 7) sorted by relevance

/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/
H A Dni65.h32 #define CSR0_STOP 0x0004 /* Stop (RS) */ macro
H A Dsun3lance.c213 #define CSR0_STOP 0x0004 /* stop (RS) */ macro
332 ioaddr_probe[0] = CSR0_INIT | CSR0_STOP;
334 if(ioaddr_probe[0] != CSR0_STOP) {
358 REGA(CSR0) = CSR0_STOP;
423 REGA(CSR0) = CSR0_STOP;
437 DREG = CSR0_STOP;
531 DREG = CSR0_STOP;
588 REGA( CSR0 ) = CSR0_STOP;
706 REGA(CSR0) = CSR0_STOP;
744 REGA(CSR0) = CSR0_STOP;
[all...]
H A Datarilance.c314 #define CSR0_STOP 0x0004 /* stop (RS) */ macro
510 ioaddr[0] = CSR0_INIT | CSR0_STOP;
511 if (ioaddr[0] != CSR0_STOP) {
517 ioaddr[0] = CSR0_STOP;
518 if (ioaddr[0] != CSR0_STOP) {
538 REGA( CSR0 ) = CSR0_STOP;
667 DREG = CSR0_STOP;
740 DREG = CSR0_STOP;
873 DREG = csr0 & ~(CSR0_INIT | CSR0_STRT | CSR0_STOP |
1064 DREG = CSR0_STOP;
[all...]
H A Dpcnet32.c199 #define CSR0_STOP 0x4 macro
795 lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */
891 lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); /* stop the chip */
905 lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */
972 lp->a.write_csr(ioaddr, CSR0, CSR0_STOP); /* Set STOP bit */
1393 if (!(csr0 & CSR0_STOP)) /* If not stopped */
1430 if (!(csr0 & CSR0_STOP)) { /* If not stopped */
2343 if (lp->a.read_csr(ioaddr, CSR0) & CSR0_STOP)
2374 lp->a.write_csr(ioaddr, CSR0, CSR0_STOP);
2547 lp->a.write_csr(ioaddr, CSR0, CSR0_STOP);
[all...]
H A Dni65.c251 writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */
555 writereg(CSR0_CLRALL|CSR0_STOP,CSR0);
708 writedatareg(CSR0_STOP);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/net/arm/
H A Dam79c961a.h33 #define CSR0_STOP 0x0004 macro
H A Dam79c961a.c212 write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP);
268 write_rreg (dev->base_addr, CSR0, CSR0_STOP);
336 write_rreg (dev->base_addr, CSR0, CSR0_STOP);
396 stopped = read_rreg(dev->base_addr, CSR0) & CSR0_STOP;
650 write_rreg (dev->base_addr, CSR0, CSR0_STOP);

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