Searched refs:BIT8 (Results 1 - 25 of 27) sorted by relevance

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/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/vt6655/
H A Dhostap.h44 #define WLAN_RATE_24M BIT8
H A D80211hdr.h46 #define BIT8 0x00000100 macro
167 #define WLAN_GET_FC_TODS(n) ((((unsigned short)(n) << 8) & (BIT8)) >> 8)
190 #define WLAN_GET_CAP_INFO_SPECTRUMMNG(n) ((((n)) & BIT8) >> 10)
202 #define WLAN_GET_FC_TODS(n) ((((unsigned short)(n)) & (BIT8)) >> 8)
226 #define WLAN_GET_CAP_INFO_SPECTRUMMNG(n) (((n) & BIT8) >> 10)
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/vt6656/
H A Dhostap.h44 #define WLAN_RATE_24M BIT8
H A D80211hdr.h44 #define BIT8 0x00000100 macro
164 #define WLAN_GET_FC_TODS(n) ((((WORD)(n) << 8) & (BIT8)) >> 8)
187 #define WLAN_GET_CAP_INFO_SPECTRUMMNG(n) ((((n)) & BIT8) >> 10)
198 #define WLAN_GET_FC_TODS(n) ((((WORD)(n)) & (BIT8)) >> 8)
220 #define WLAN_GET_CAP_INFO_SPECTRUMMNG(n) (((n) & BIT8) >> 10)
H A Drxtx.c2848 (Key_info & BIT8) && (Key_info & BIT9)) { //send 2/2 key
2860 (Key_info & BIT8) && (Key_info & BIT9)) {
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/arch/arm/mach-integrator/include/mach/
H A Dbits.h34 #define BIT8 0x00000100 macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/rtl8192su/
H A Dr8192S_hw.h634 #define MACTXEN BIT8 //
683 #define TSFEN BIT8 //
706 #define TCR_TSFEN BIT8 // TSF function on or off.
834 #define RRSR_24M BIT8
1078 #define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt
1106 #define TPPoll_HCCAQ BIT8 // HCCA queue polling
1137 #define CCX_CMD_FUNCTION_ENABLE BIT8
H A Dr8192S_firmware.h181 #define FW_ANTENNA_SW BIT8
H A Dr8192U.h75 #define BIT8 0x00000100 macro
131 #define COMP_SWBW BIT8 // For bandwidth switch.
H A Dr8192S_phy.c2849 RfPiEnable = (u8)rtl8192_QueryBBReg(dev, rFPGA0_XA_HSSIParameter1, BIT8);
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/rtl8192e/
H A Dr8192E_hw.h279 #define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt
298 #define TPPoll_HCCAQ BIT8 // HCCA queue polling
431 #define RRSR_24M BIT8
H A Dr8192E.h62 #define BIT8 0x00000100 macro
115 #define COMP_SWBW BIT8 // For bandwidth switch.
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/scsi/
H A Dtmscsim.h184 #define BIT8 0x00000100 macro
215 #define SRB_DATA_XFER BIT8
H A Ddc395x.h64 #define BIT8 0x00000100 macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/include/linux/
H A Dsynclink.h26 #define BIT8 0x0100 macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/char/
H A Dsynclink.c508 #define RXSTATUS_SHORT_FRAME BIT8
509 #define RXSTATUS_CODE_VIOLATION BIT8
570 #define MISCSTATUS_DSR BIT8
593 #define SICR_DSR_INACTIVE BIT8
594 #define SICR_DSR (BIT9+BIT8)
1651 usc_OutDmaReg(info, CDIR, BIT8+BIT0 );
4551 /* Note: must preserve state of BIT8 in DCAR */
4580 /* Note: must preserve state of BIT8 in DCAR */
4836 RegValue |= BIT9 + BIT8;
4838 RegValue |= ( BIT12 | BIT10 | BIT9 | BIT8);
[all...]
H A Dsynclink_gt.c418 #define IRQ_RXOVER BIT8
2367 if (gsr & (BIT8 << i))
4066 val |= BIT8;
4106 val |= BIT8;
4155 if ((rd_reg32(info, JCR) & BIT8) && info->params.data_rate &&
4219 case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break;
4283 case HDLC_CRC_32_CCITT: val |= BIT9 + BIT8; break;
4925 if (!(*(src+1) & (BIT9 + BIT8))) {
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/rtl8192e/ieee80211/
H A Drtl819x_Qos.h12 #define BIT8 0x00000100 macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/rtl8192su/ieee80211/
H A Drtl819x_Qos.h30 #define BIT8 0x00000100 macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/rtl8192u/ieee80211/
H A Drtl819x_Qos.h12 #define BIT8 0x00000100 macro
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/rtl8192u/
H A Dr8192U_hw.h315 #define RRSR_24M BIT8
H A Dr8192U.h60 #define BIT8 0x00000100 macro
107 #define COMP_SWBW BIT8 // For bandwidth switch.
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/rt2860/
H A Drtmp.h67 extern u8 BIT8[8];
1141 pAd->ApCfg.MBSSID[apidx].TimBitmaps[WLAN_CT_TIM_BCMC_OFFSET] &= ~BIT8[0];
1145 pAd->ApCfg.MBSSID[apidx].TimBitmaps[WLAN_CT_TIM_BCMC_OFFSET] |= BIT8[0];
1151 ad_p->ApCfg.MBSSID[apidx].TimBitmaps[tim_offset] &= (~BIT8[bit_offset]); }
1157 ad_p->ApCfg.MBSSID[apidx].TimBitmaps[tim_offset] |= BIT8[bit_offset]; }
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/scsi/lpfc/
H A Dlpfc_hw4.h620 #define LPFC_SLI4_INTR8 BIT8
/netgear-R7000-V1.0.7.12_1.2.5/components/opensource/linux/linux-2.6.36/drivers/staging/rt2860/common/
H A Drtmp_init.c39 u8 BIT8[] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 }; variable

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