Searched refs:x128 (Results 1 - 25 of 134) sorted by relevance

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/netbsd-current/external/bsd/wpa/dist/wpa_supplicant/wpa_gui-qt4/icons/
H A DMakefile4 SIZES := 16x16 22x22 32x32 48x48 64x64 128x128
/netbsd-current/sys/external/gpl2/dts/dist/include/dt-bindings/clock/
H A Dlpc18xx-ccu.h20 #define CLK_APB3_CAN0 0x128
H A Domap5.h84 #define OMAP5_MMC4_CLKCTRL OMAP5_CLKCTRL_INDEX(0x128)
H A Domap4.h121 #define OMAP4_MMC4_CLKCTRL OMAP4_CLKCTRL_INDEX(0x128)
H A Ddra7.h150 #define DRA7_MMC4_CLKCTRL _DRA7_L4PER_CLKCTRL_INDEX(0x128)
326 #define DRA7_L4PER_MMC4_CLKCTRL DRA7_L4PER_CLKCTRL_INDEX(0x128)
/netbsd-current/external/gpl3/gcc.old/dist/libgcc/config/libbid/
H A Dbid_from_int.c191 UINT128 x128, res128; local
227 x128.w[1] = 0x0;
228 x128.w[0] = x;
229 round128_19_38 (q, ind, x128, &res128, &incr_exp,
/netbsd-current/external/gpl3/gcc/dist/libgcc/config/libbid/
H A Dbid_from_int.c191 UINT128 x128, res128; local
227 x128.w[1] = 0x0;
228 x128.w[0] = x;
229 round128_19_38 (q, ind, x128, &res128, &incr_exp,
/netbsd-current/sys/arch/arm/ixp12x0/
H A Dixp12x0_pcireg.h112 #define I2O_OPH 0x128
/netbsd-current/sys/arch/arm/nvidia/
H A Dtegra124_xusbpadreg.h106 #define XUSB_PADCTL_IOPHY_MISC_PAD_P2_CTL6_REG 0x128
H A Dtegra124_cpu.c61 #define FUSE_GPU_IDDQ_REG 0x128
/netbsd-current/sys/arch/arm/broadcom/
H A Dbcm2835_cm.h153 #define CM_OSCFREQI 0x128
/netbsd-current/sys/arch/arm/marvell/
H A Dmvsocreg.h132 #define MVSOC_MLMB_L2CFG 0x128 /* L2 Cache Config */
/netbsd-current/sys/dev/usb/
H A Dif_smscreg.h149 #define SMSC_WUFF 0x128
/netbsd-current/external/gpl3/binutils/dist/include/opcode/
H A Dspu-insns.h191 APUOP(M_BIZ, RR, 0x128, "biz", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
386 APUOPFB(M_BIZD, RR, 0x128, 0x20, "bizd", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
387 APUOPFB(M_BIZE, RR, 0x128, 0x10, "bize", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
396 APUOP(M_BIF, RR, 0x128, "bif", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
403 APUOPFB(M_BIFD, RR, 0x128, 0x20, "bifd", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
404 APUOPFB(M_BIFE, RR, 0x128, 0x10, "bife", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
/netbsd-current/external/gpl3/gdb.old/dist/include/opcode/
H A Dspu-insns.h191 APUOP(M_BIZ, RR, 0x128, "biz", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
386 APUOPFB(M_BIZD, RR, 0x128, 0x20, "bizd", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
387 APUOPFB(M_BIZE, RR, 0x128, 0x10, "bize", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
396 APUOP(M_BIF, RR, 0x128, "bif", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
403 APUOPFB(M_BIFD, RR, 0x128, 0x20, "bifd", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
404 APUOPFB(M_BIFE, RR, 0x128, 0x10, "bife", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
/netbsd-current/external/gpl3/gdb/dist/include/opcode/
H A Dspu-insns.h191 APUOP(M_BIZ, RR, 0x128, "biz", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
386 APUOPFB(M_BIZD, RR, 0x128, 0x20, "bizd", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
387 APUOPFB(M_BIZE, RR, 0x128, 0x10, "bize", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
396 APUOP(M_BIF, RR, 0x128, "bif", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
403 APUOPFB(M_BIFD, RR, 0x128, 0x20, "bifd", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
404 APUOPFB(M_BIFE, RR, 0x128, 0x10, "bife", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
/netbsd-current/external/gpl3/binutils.old/dist/include/opcode/
H A Dspu-insns.h191 APUOP(M_BIZ, RR, 0x128, "biz", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
386 APUOPFB(M_BIZD, RR, 0x128, 0x20, "bizd", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
387 APUOPFB(M_BIZE, RR, 0x128, 0x10, "bize", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
396 APUOP(M_BIF, RR, 0x128, "bif", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
403 APUOPFB(M_BIFD, RR, 0x128, 0x20, "bifd", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
404 APUOPFB(M_BIFE, RR, 0x128, 0x10, "bife", _A2(A_T,A_A), 00011, BR) /* BIZ IP<-RA_if(RT) */
/netbsd-current/sys/arch/arm/footbridge/
H A Ddc21285reg.h188 #define I2O_OUTBOUND_POST_HEAD 0x128
/netbsd-current/sys/arch/arm/imx/
H A Dimx23_icollreg.h242 #define HW_ICOLL_INTERRUPT0_CLR 0x128
H A Dimx23_powerreg.h373 #define HW_POWER_SPECIAL_CLR 0x128
/netbsd-current/sys/arch/amiga/amiga/
H A Dcc_registers.h174 #define R_SPR2PTH 0x128
/netbsd-current/sys/dev/sbus/
H A Dp9100reg.h136 #define VID_VBRE 0x128 /* vblank raising edge */
/netbsd-current/sys/dev/pci/
H A Dcs4281reg.h96 #define CS4281_DBA1 0x128 /* DMA Engine 1 Base Address Register */
/netbsd-current/sys/arch/arm/ti/
H A Domap2_gpmcreg.h90 #define GPMC_CONFIG3_4 0x128
/netbsd-current/sys/dev/ic/
H A Dahcisatareg.h265 #define AHCI_P_SSTS(p) (0x128 + AHCI_P_OFFSET(p)) /* Serial ATA status */

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