History log of /netbsd-current/sys/arch/arm/marvell/mvsocreg.h
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
# 1.13 07-Jan-2017 kiyohara

Add support Marvell Dove.
Also <SoC>_intr_bootstrap() rename to <SoC>_bootstrap(). And SoC init func, getclk into that.


Revision tags: pgoyette-localcount-20170107 nick-nhusb-base-20161204 pgoyette-localcount-20161104 nick-nhusb-base-20161004 localcount-20160914 pgoyette-localcount-20160806 pgoyette-localcount-20160726 pgoyette-localcount-base nick-nhusb-base-20160907 nick-nhusb-base-20160529 nick-nhusb-base-20160422 nick-nhusb-base-20160319 nick-nhusb-base-20151226 nick-nhusb-base-20150921 nick-nhusb-base-20150606
# 1.12 03-Jun-2015 hsuenaga

dump Mbus settins on boot if AV_VERBOSE or AV_DEBUG is enabled.


# 1.11 19-May-2015 hsuenaga

fix Marvell Coherency Barrier register address.
configure coherency bus maintance broadcast using MPIDR. we need to configure
this regardless of 'options MULTIPROCESSOR.'


# 1.10 14-May-2015 hsuenaga

add synchronization barrier for AURORA_IO_CACHE_COHERENCY.
cleanup MARVELL L2 cache code.


Revision tags: netbsd-7-1-RC1 netbsd-7-0-2-RELEASE netbsd-7-nhusb-base netbsd-7-0-1-RELEASE netbsd-7-0-RELEASE netbsd-7-0-RC3 netbsd-7-0-RC2 netbsd-7-0-RC1 nick-nhusb-base-20150406 nick-nhusb-base netbsd-7-base yamt-pagecache-base9 tls-earlyentropy-base riastradh-xf86-video-intel-2-7-1-pre-2-21-15 riastradh-drm2-base3 rmind-smpnet-nbase rmind-smpnet-base tls-maxphys-base
# 1.9 17-Feb-2014 kiyohara

branches: 1.9.6;
Add some MVSOC_MLMB_ definitions for supporting DDR3.


# 1.8 23-Dec-2013 kiyohara

Support to check the clock gating for Armada XP in armadaxp.c.
Also move the checking for clock gate of Kirkwood into kirkwood.c.


# 1.7 23-Dec-2013 kiyohara

Move Misc Registers from mvsocreg.h to armadaxpreg.h. These registers only
Armada XP. The misc_base initializes in initarm() instead of mvsoc_bootstrap().


# 1.6 20-Nov-2013 kiyohara

Add defines for MISC registers.


# 1.5 30-Sep-2013 kiyohara

Remove #ifdef ARMADAXP. It is OK !ARMADAXP.


Revision tags: riastradh-drm2-base2 riastradh-drm2-base1 riastradh-drm2-base
# 1.4 29-May-2013 rkujawa

branches: 1.4.2;
Add support for mvsoc-based Armada XP peripherals.

Obtained from Marvell, Semihalf.


Revision tags: agc-symver-base yamt-pagecache-base8 yamt-pagecache-base7 yamt-pagecache-base6
# 1.3 19-Oct-2012 msaitoh

Add CLKGATING_BIT for some devices. This change prevent some boards
that a device's clock is stopped from hangup.


Revision tags: netbsd-6-0-6-RELEASE netbsd-6-0-5-RELEASE netbsd-6-0-4-RELEASE netbsd-6-0-3-RELEASE netbsd-6-0-2-RELEASE netbsd-6-0-1-RELEASE matt-nb6-plus-nbase netbsd-6-0-RELEASE netbsd-6-0-RC2 matt-nb6-plus-base netbsd-6-0-RC1 jmcneill-usbmp-base10 yamt-pagecache-base5 jmcneill-usbmp-base9 yamt-pagecache-base4 jmcneill-usbmp-base8 jmcneill-usbmp-base7 jmcneill-usbmp-base6 jmcneill-usbmp-base5 jmcneill-usbmp-base4 jmcneill-usbmp-base3 jmcneill-usbmp-pre-base2 jmcneill-usbmp-base2 netbsd-6-base jmcneill-usbmp-base jmcneill-audiomp3-base yamt-pagecache-base3 yamt-pagecache-base2 yamt-pagecache-base rmind-uvmplock-nbase cherry-xenmp-base jym-xensuspend-nbase rmind-uvmplock-base uebayasi-xip-base7 bouyer-quota2-nbase bouyer-quota2-base jym-xensuspend-base
# 1.2 01-Feb-2011 jakllsch

branches: 1.2.2; 1.2.6; 1.2.12; 1.2.16;
Address 3rd issue in PR#43990.
Different implementation but same method as suggested.


Revision tags: jruoho-x86intr-base matt-mips64-premerge-20101231 uebayasi-xip-base6 uebayasi-xip-base5 uebayasi-xip-base4 uebayasi-xip-base3 yamt-nfs-mp-base11
# 1.1 03-Oct-2010 kiyohara

branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8;
Add support Marvell Sheeva Core and SoC. (Orion/Kirkwood)
Discovery Innovation not yet.