Searched refs:voltage_level (Results 1 - 11 of 11) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/i915/display/
H A Dintel_cdclk.c488 cdclk_state->voltage_level = (val & DSPFREQGUAR_MASK) >>
491 cdclk_state->voltage_level = (val & DSPFREQGUAR_MASK_CHV) >>
536 u32 val, cmd = cdclk_state->voltage_level;
623 u32 val, cmd = cdclk_state->voltage_level;
715 cdclk_state->voltage_level =
786 cdclk_state->voltage_level);
925 cdclk_state->voltage_level =
1083 cdclk_state->voltage_level);
1154 cdclk_state.voltage_level = skl_calc_voltage_level(cdclk_state.cdclk);
1165 cdclk_state.voltage_level
[all...]
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/
H A Damdgpu_dcn_calcs.c487 input.clks_cfg.voltage = v->voltage_level;
549 if (v->voltage_level < 2) {
579 if (v->voltage_level < 3) {
603 v->fabric_and_dram_bandwidth = v->fabric_and_dram_bandwidth_per_state[v->voltage_level];
607 v->dcfclk = v->dcfclk_per_state[v->voltage_level];
618 if (v->voltage_level >= 2) {
622 if (v->voltage_level >= 3)
1036 if (v->voltage_level != 0
1043 if (v->voltage_level == 0 &&
1096 if (v->voltage_level !
[all...]
H A Damdgpu_dcn_calc_auto.c1005 v->voltage_level = v->voltage_level_without_immediate_flip;
1009 v->voltage_level = v->voltage_level_with_immediate_flip;
1011 v->dcfclk = v->dcfclk_per_state[v->voltage_level];
1012 v->fabric_and_dram_bandwidth = v->fabric_and_dram_bandwidth_per_state[v->voltage_level];
1014 v->required_dispclk_per_ratio[j] = v->required_dispclk[v->voltage_level][j];
1016 v->dpp_per_plane_per_ratio[j][k] = v->no_of_dpp[v->voltage_level][j][k];
1018 v->dispclk_dppclk_support_per_ratio[j] = v->dispclk_dppclk_support[v->voltage_level][j];
1020 v->max_phyclk = v->phyclk_per_state[v->voltage_level];
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/
H A Ddcn_calcs.h213 int voltage_level; member in struct:dcn_bw_internal_vars
/netbsd-current/sys/external/bsd/drm2/dist/drm/radeon/
H A Dradeon_atombios.c3102 void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type) argument
3106 u8 frev, crev, volt_index = voltage_level;
3112 if (voltage_level == 0xff01)
3124 args.v2.usVoltageLevel = cpu_to_le16(voltage_level);
3129 args.v3.usVoltageLevel = cpu_to_le16(voltage_level);
3337 u16 voltage_level, u8 voltage_type,
3353 args.v2.usVoltageLevel = cpu_to_le16(voltage_level);
3361 args.v2.usVoltageLevel = cpu_to_le16(voltage_level);
3336 radeon_atom_get_voltage_gpio_settings(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type, u32 *gpio_value, u32 *gpio_mask) argument
H A Dradeon.h315 void radeon_atom_set_voltage(struct radeon_device *rdev, u16 voltage_level, u8 voltage_type);
317 u16 voltage_level, u8 voltage_type,
H A Dradeon_ci_dpm.c3000 SMU7_Discrete_VoltageLevel voltage_level; local
3067 if (ci_populate_mvdd_value(rdev, 0, &voltage_level))
3071 cpu_to_be32(voltage_level.Voltage * VOLTAGE_SCALE);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_iceland_smumgr.c1435 SMU71_Discrete_VoltageLevel voltage_level; local
1509 if (0 == iceland_populate_mvdd_value(hwmgr, 0, &voltage_level))
1511 PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE);
H A Damdgpu_ci_smumgr.c1387 SMU7_Discrete_VoltageLevel voltage_level; local
1461 if (0 == ci_populate_mvdd_value(hwmgr, 0, &voltage_level))
1463 PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE);
H A Damdgpu_tonga_smumgr.c1187 SMIO_Pattern voltage_level; local
1251 if (0 == tonga_populate_mvdd_value(hwmgr, 0, &voltage_level))
1253 PP_HOST_TO_SMC_UL(voltage_level.Voltage * VOLTAGE_SCALE);
/netbsd-current/sys/external/bsd/drm2/dist/drm/i915/
H A Di915_drv.h896 u8 voltage_level; member in struct:intel_cdclk_state

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