Searched refs:tc_port (Results 1 - 8 of 8) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/i915/display/
H A Dintel_tc.c38 enum tc_port tc_port = intel_port_to_tc(i915, port); local
54 dig_port->tc_phy_fia = tc_port / 2;
55 dig_port->tc_phy_fia_idx = tc_port % 2;
58 dig_port->tc_phy_fia_idx = tc_port;
182 enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port); local
201 if (intel_uncore_read(uncore, SDEISR) & SDE_TC_HOTPLUG_ICP(tc_port))
558 enum tc_port tc_port local
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H A Dintel_dpll_mgr.c2661 static enum tc_port icl_pll_id_to_tc_port(enum intel_dpll_id id)
2666 enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port) argument
2668 return tc_port + DPLL_ID_ICL_MGPLL1;
3140 enum tc_port tc_port = icl_pll_id_to_tc_port(id); local
3150 val = I915_READ(MG_PLL_ENABLE(tc_port));
3154 hw_state->mg_refclkin_ctl = I915_READ(MG_REFCLKIN_CTL(tc_port));
3158 I915_READ(MG_CLKTOP2_CORECLKCTL1(tc_port));
3163 I915_READ(MG_CLKTOP2_HSCLKCTL(tc_port));
3202 enum tc_port tc_port = icl_pll_id_to_tc_port(id); local
3357 enum tc_port tc_port = icl_pll_id_to_tc_port(pll->info->id); local
3407 enum tc_port tc_port = icl_pll_id_to_tc_port(pll->info->id); local
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H A Dintel_ddi.c2698 enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder->port); local
2714 val = I915_READ(MG_TX1_LINK_PARAMS(ln, tc_port));
2716 I915_WRITE(MG_TX1_LINK_PARAMS(ln, tc_port), val);
2718 val = I915_READ(MG_TX2_LINK_PARAMS(ln, tc_port));
2720 I915_WRITE(MG_TX2_LINK_PARAMS(ln, tc_port), val);
2725 val = I915_READ(MG_TX1_SWINGCTRL(ln, tc_port));
2729 I915_WRITE(MG_TX1_SWINGCTRL(ln, tc_port), val);
2731 val = I915_READ(MG_TX2_SWINGCTRL(ln, tc_port));
2735 I915_WRITE(MG_TX2_SWINGCTRL(ln, tc_port), va
2831 enum tc_port tc_port = intel_port_to_tc(dev_priv, encoder->port); local
2954 enum tc_port tc_port = intel_port_to_tc(dev_priv, local
3180 enum tc_port tc_port = intel_port_to_tc(dev_priv, intel_dig_port->base.port); local
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H A Dintel_dpll_mgr.h387 enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port);
H A Dintel_display.h259 enum tc_port { enum
540 enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv,
H A Dintel_display_power.c573 enum tc_port tc_port; local
575 tc_port = TGL_AUX_PW_TO_TC_PORT(power_well->desc->hsw.idx);
576 I915_WRITE(HIP_INDEX_REG(tc_port), HIP_INDEX_VAL(tc_port, 0x2));
578 if (intel_de_wait_for_set(dev_priv, DKL_CMN_UC_DW_27(tc_port),
H A Dintel_display.c7167 enum tc_port intel_port_to_tc(struct drm_i915_private *dev_priv, enum port port)
/netbsd-current/sys/external/bsd/drm2/dist/drm/i915/
H A Di915_reg.h2079 #define MG_PHY_PORT_LN(ln, tc_port, ln0p1, ln0p2, ln1p1) \
2080 _MMIO(_PORT(tc_port, ln0p1, ln0p2) + (ln) * ((ln1p1) - (ln0p1)))
2090 #define MG_TX1_LINK_PARAMS(ln, tc_port) \
2091 MG_PHY_PORT_LN(ln, tc_port, MG_TX_LINK_PARAMS_TX1LN0_PORT1, \
2103 #define MG_TX2_LINK_PARAMS(ln, tc_port) \
2104 MG_PHY_PORT_LN(ln, tc_port, MG_TX_LINK_PARAMS_TX2LN0_PORT1, \
2117 #define MG_TX1_PISO_READLOAD(ln, tc_port) \
2118 MG_PHY_PORT_LN(ln, tc_port, MG_TX_PISO_READLOAD_TX1LN0_PORT1, \
2130 #define MG_TX2_PISO_READLOAD(ln, tc_port) \
2131 MG_PHY_PORT_LN(ln, tc_port, MG_TX_PISO_READLOAD_TX2LN0_PORT
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