Searched refs:ssInfo (Results 1 - 3 of 3) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Damdgpu_ppatomctrl.c1225 ATOM_ASIC_SS_ASSIGNMENT *ssInfo; local
1235 ssInfo = &table->asSpreadSpectrum[0];
1237 while (((uint8_t *)ssInfo - (uint8_t *)table) <
1239 if ((clockSource == ssInfo->ucClockIndication) &&
1240 ((uint32_t)clockSpeed <= le32_to_cpu(ssInfo->ulTargetClockRange))) {
1245 ssInfo = (ATOM_ASIC_SS_ASSIGNMENT *)((uint8_t *)ssInfo +
1251 le16_to_cpu(ssInfo->usSpreadSpectrumPercentage);
1252 ssEntry->speed_spectrum_rate = le16_to_cpu(ssInfo->usSpreadRateInKhz);
1260 switch (ssInfo
1282 atomctrl_get_memory_clock_spread_spectrum( struct pp_hwmgr *hwmgr, const uint32_t memory_clock, pp_atomctrl_internal_ss_info *ssInfo) argument
1293 atomctrl_get_engine_clock_spread_spectrum( struct pp_hwmgr *hwmgr, const uint32_t engine_clock, pp_atomctrl_internal_ss_info *ssInfo) argument
[all...]
H A Dppatomctrl.h296 extern int atomctrl_get_memory_clock_spread_spectrum(struct pp_hwmgr *hwmgr, const uint32_t memory_clock, pp_atomctrl_internal_ss_info *ssInfo);
297 extern int atomctrl_get_engine_clock_spread_spectrum(struct pp_hwmgr *hwmgr, const uint32_t engine_clock, pp_atomctrl_internal_ss_info *ssInfo);
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_fiji_smumgr.c907 struct pp_atomctrl_internal_ss_info ssInfo; local
911 vco_freq, &ssInfo)) {
919 (ref_divider * ssInfo.speed_spectrum_rate);
921 uint32_t clk_v = 4 * ssInfo.speed_spectrum_percentage *

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