/netbsd-current/sys/arch/amiga/dev/ |
H A D | sci.c | 270 device_xname(dev->sc_dev), where, *dev->sci_csr, *dev->sci_bus_csr); 380 if ((*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) && 381 (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL)) && 382 (*dev->sci_bus_csr & (SCI_BUS_BSY|SCI_BUS_SEL))) 388 while ((*dev->sci_bus_csr & SCI_BUS_BSY) == 0) { 418 csr = *dev->sci_bus_csr; 429 csr = *dev->sci_bus_csr; 437 while (*dev->sci_bus_csr & SCI_BUS_REQ); 450 volatile register u_char *sci_bus_csr = dev->sci_bus_csr; local [all...] |
H A D | wstsc.c | 150 sc->sci_bus_csr = rp + 8; 214 QPRINTF(("supradma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 226 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 231 len, *dev->sci_bus_csr, wait); 263 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 268 len, *dev->sci_bus_csr, wait); 295 QPRINTF(("supradma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 310 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 315 len, *dev->sci_bus_csr, wait); 351 QPRINTF(("supradma_in2 %d, csr=%02x\n", len, *dev->sci_bus_csr)); 431 volatile register u_char *sci_bus_csr = dev->sci_bus_csr; local [all...] |
H A D | scireg.h | 58 volatile unsigned char sci_bus_csr; /* r: Bus Status */ 59 #define sci_sel_enb sci_bus_csr /* w: Select enable */
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H A D | otgsc.c | 138 sc->sci_bus_csr = rp + 0x40; 196 QPRINTF(("otgsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 207 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 212 len, *dev->sci_bus_csr, wait); 239 QPRINTF(("otgsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 254 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 259 len, *dev->sci_bus_csr, wait);
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H A D | ivsc.c | 143 sc->sci_bus_csr = rp + 8; 203 QPRINTF(("ivsc_dma_in %d, csr=%02x\n", len, *dev->sci_bus_csr)); 214 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 219 len, *dev->sci_bus_csr, wait); 251 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 256 len, *dev->sci_bus_csr, wait); 283 QPRINTF(("ivsc_dma_out %d, csr=%02x\n", len, *dev->sci_bus_csr)); 298 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 303 len, *dev->sci_bus_csr, wait);
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H A D | mlhsc.c | 136 sc->sci_bus_csr = rp + 9; 190 csr = *dev->sci_bus_csr; 204 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 240 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 273 csr = *dev->sci_bus_csr; 291 || !(*dev->sci_bus_csr & SCI_BUS_BSY) 319 || !(*dev->sci_bus_csr & SCI_BUS_BSY)
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H A D | scivar.h | 53 volatile u_char *sci_bus_csr; /* r: Bus Status */ member in struct:sci_softc
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H A D | empsc.c | 138 sc->sci_bus_csr = rp + 0x40;
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/netbsd-current/sys/arch/mac68k/include/ |
H A D | scsi_5380.h | 54 volatile unsigned char sci_bus_csr; /* r: Bus Status */ member in struct:__anon8713 55 #define sci_sel_enb sci_bus_csr /* w: Select enable */
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/netbsd-current/sys/dev/ic/ |
H A D | ncr5380reg.h | 80 #define sci_bus_csr sci_r4 /* r: Bus Status */ macro 137 * R4: Current (SCSI) Bus status (.sci_bus_csr)
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H A D | ncr5380sbc.c | 197 if (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ) { 215 if ((NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ) == 0) { 264 if (SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)) != phase) 320 if (SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)) != phase) 1078 bus = NCR5380_READ(sc, sci_bus_csr); 1105 bus = NCR5380_READ(sc, sci_bus_csr); 1158 bus = NCR5380_READ(sc, sci_bus_csr); 1189 phase = SCI_BUS_PHASE(NCR5380_READ(sc, sci_bus_csr)); 1446 if (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_BSY) 1464 if ((NCR5380_READ(sc, sci_bus_csr) [all...] |
H A D | ncr5380var.h | 77 #define SCI_BUSY(sc) (NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_BSY)
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/netbsd-current/sys/arch/mac68k/dev/ |
H A D | sbc.c | 187 && ((*ncr_sc->sci_bus_csr & ~SCI_BUS_RST) == 0)) { 208 u_int8_t bus_csr = *ncr_sc->sci_bus_csr; 599 *ncr_sc->sci_bus_csr); 788 *ncr_sc->sci_bus_csr);
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/netbsd-current/sys/dev/podulebus/ |
H A D | hcsc.c | 255 if ((NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ) == 0 ||
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H A D | oak.c | 270 if ((NCR5380_READ(sc, sci_bus_csr) & SCI_BUS_REQ) == 0 ||
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