Searched refs:sc_clks (Results 1 - 25 of 40) sorted by relevance

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/netbsd-current/sys/arch/arm/nxp/
H A Dimx_ccm.c55 clk = &sc->sc_clks[i];
234 if (sc->sc_clks[i].base.name == NULL)
236 if (strcmp(sc->sc_clks[i].base.name, name) == 0)
237 return &sc->sc_clks[i];
263 sc->sc_clks[i].base.domain = &sc->sc_clkdom;
264 clk_attach(&sc->sc_clks[i].base);
282 clk = &sc->sc_clks[i];
H A Dimx8mq_ccm.c197 sc->sc_clks = imx8mq_ccm_clks;
H A Dimx_ccm.h335 struct imx_ccm_clk *sc_clks; member in struct:imx_ccm_softc
/netbsd-current/sys/arch/arm/sunxi/
H A Dsun50i_a64_ccu.c631 sc->sc_clks = sun50i_a64_ccu_clks;
644 clk_set_parent(&sc->sc_clks[A64_CLK_DE].base, &sc->sc_clks[A64_CLK_PLL_DE].base);
645 clk_set_rate(&sc->sc_clks[A64_CLK_PLL_DE].base, 420000000);
648 clk_set_rate(&sc->sc_clks[A64_CLK_PLL_VIDEO0].base, 297000000);
649 clk_set_rate(&sc->sc_clks[A64_CLK_PLL_VIDEO1].base, 297000000);
652 clk_set_parent(&sc->sc_clks[A64_CLK_TCON1].base, &sc->sc_clks[A64_CLK_PLL_VIDEO1].base);
655 clk_set_parent(&sc->sc_clks[A64_CLK_HDMI].base, &sc->sc_clks[A64_CLK_PLL_VIDEO
[all...]
H A Dsunxi_ccu.c118 clk = &sc->sc_clks[clock_id];
296 if (sc->sc_clks[i].base.name == NULL)
298 if (strcmp(sc->sc_clks[i].base.name, name) == 0)
299 return &sc->sc_clks[i];
325 sc->sc_clks[i].base.domain = &sc->sc_clkdom;
326 clk_attach(&sc->sc_clks[i].base);
347 clk = &sc->sc_clks[i];
H A Dsunxi_rtc.c299 struct clk sc_clks[SUNXI_RTC_NCLKS]; member in struct:sunxi_rtc_softc
349 return &sc->sc_clks[clock_id];
431 sc->sc_clks[i].domain = &sc->sc_clkdom;
432 sc->sc_clks[i].name = sc->sc_clk_names[i];
433 clk_attach(&sc->sc_clks[i]);
506 return &sc->sc_clks[i];
518 if (clk == &sc->sc_clks[SUNXI_RTC_CLK_IOSC]) {
548 if (clk != &sc->sc_clks[SUNXI_RTC_CLK_LOSC_GATE])
567 if (clk != &sc->sc_clks[SUNXI_RTC_CLK_LOSC_GATE])
586 if (clk == &sc->sc_clks[SUNXI_RTC_CLK_IOS
[all...]
H A Dsun8i_h3_r_ccu.c119 sc->sc_clks = sun8i_h3_r_ccu_clks;
H A Dsun9i_a80_mmcclk.c93 sc->sc_clks = sun9i_a80_mmcclk_clks;
H A Dsun50i_a64_r_ccu.c133 sc->sc_clks = sun50i_a64_r_ccu_clks;
H A Dsun9i_a80_usbclk.c131 sc->sc_clks = sun9i_a80_usbclk_clks;
H A Dsun50i_h6_r_ccu.c148 sc->sc_clks = sun50i_h6_r_ccu_clks;
H A Dsunxi_de2_ccu.c139 sc->sc_clks = conf->clks;
H A Dsun5i_a13_ccu.c311 sc->sc_clks = sun5i_a13_ccu_clks;
H A Dsun6i_a31_ccu.c295 sc->sc_clks = sun6i_a31_ccu_clks;
H A Dsun8i_v3s_ccu.c405 sc->sc_clks = sun8i_v3s_ccu_clks;
/netbsd-current/sys/arch/arm/amlogic/
H A Dmeson_clk.c119 clk = &sc->sc_clks[clock_id];
297 if (sc->sc_clks[i].base.name == NULL)
299 if (strcmp(sc->sc_clks[i].base.name, name) == 0)
300 return &sc->sc_clks[i];
315 sc->sc_clks[i].base.domain = &sc->sc_clkdom;
316 clk_attach(&sc->sc_clks[i].base);
337 clk = &sc->sc_clks[i];
H A Dmesongxbb_aoclkc.c102 sc->sc_clks = mesongxbb_aoclkc_clks;
H A Dmesong12_aoclkc.c127 sc->sc_clks = mesong12_aoclkc_clks;
H A Dmesongxbb_clkc.c250 sc->sc_clks = mesongxbb_clkc_clks;
/netbsd-current/sys/arch/arm/rockchip/
H A Drk_cru.c105 clk = &sc->sc_clks[i];
286 if (sc->sc_clks[i].base.name == NULL)
288 if (strcmp(sc->sc_clks[i].base.name, name) == 0)
289 return &sc->sc_clks[i];
324 sc->sc_clks[i].base.domain = &sc->sc_clkdom;
325 clk_attach(&sc->sc_clks[i].base);
346 clk = &sc->sc_clks[i];
H A Drk3288_cru.c351 sc->sc_clks = rk3288_cru_clks;
/netbsd-current/sys/arch/arm/ti/
H A Dti_prcm.c190 if (sc->sc_clks[i].base.name == NULL)
192 if (strcmp(sc->sc_clks[i].base.name, name) == 0)
193 return &sc->sc_clks[i];
218 sc->sc_clks[i].base.domain = &sc->sc_clkdom;
H A Dam3_prcm.c237 struct ti_prcm_clk *tclk = &sc->sc_prcm.sc_clks[n];
277 sc->sc_prcm.sc_clks = am3_prcm_clks;
H A Dti_prcm.h165 struct ti_prcm_clk *sc_clks; member in struct:ti_prcm_softc
H A Domap3_cm.c200 sc->sc_clks = omap3_cm_clks;

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