Searched refs:mmUVD_NO_OP (Results 1 - 16 of 16) sorted by relevance
| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/uvd/ |
| H A D | uvd_4_0_d.h | 63 #define mmUVD_NO_OP 0x3BFF macro
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| H A D | uvd_4_2_d.h | 39 #define mmUVD_NO_OP 0x3bff macro
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| H A D | uvd_6_0_d.h | 40 #define mmUVD_NO_OP 0x3bff macro
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| H A D | uvd_5_0_d.h | 39 #define mmUVD_NO_OP 0x3bff macro
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| H A D | uvd_7_0_offset.h | 82 #define mmUVD_NO_OP 0x03ff macro
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_offset.h | 170 #define mmUVD_NO_OP 0x03ff macro
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| H A D | vcn_2_0_0_offset.h | 860 #define mmUVD_NO_OP 0x05bf macro
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| H A D | vcn_2_5_offset.h | 551 #define mmUVD_NO_OP 0x00a9 macro
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| /netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_uvd_v5_0.c | 552 amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0));
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| H A D | amdgpu_uvd_v4_2.c | 534 amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0));
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| H A D | amdgpu_vcn_v1_0.c | 150 SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP);
1745 amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP), 0));
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| H A D | amdgpu_uvd.c | 937 case mmUVD_NO_OP:
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| H A D | amdgpu_uvd_v6_0.c | 1086 amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0));
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| H A D | amdgpu_vcn_v2_0.c | 159 adev->vcn.inst->external.nop = SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP);
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| H A D | amdgpu_vcn_v2_5.c | 192 adev->vcn.inst[j].external.nop = SOC15_REG_OFFSET(UVD, j, mmUVD_NO_OP);
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| H A D | amdgpu_uvd_v7_0.c | 1400 amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_NO_OP), 0));
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