Searched refs:mmSMC_RESP_0 (Results 1 - 10 of 10) sorted by relevance

/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_kv_smc.c45 if ((RREG32(mmSMC_RESP_0) & SMC_RESP_0__SMC_RESP_MASK) != 0)
49 tmp = RREG32(mmSMC_RESP_0) & SMC_RESP_0__SMC_RESP_MASK;
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
H A Dsmu_6_0_d.h146 #define mmSMC_RESP_0 0x008C macro
H A Dsmu_7_0_0_d.h93 #define mmSMC_RESP_0 0x95 macro
H A Dsmu_7_1_3_d.h100 #define mmSMC_RESP_0 0x95 macro
H A Dsmu_7_1_2_d.h97 #define mmSMC_RESP_0 0x95 macro
H A Dsmu_7_1_0_d.h94 #define mmSMC_RESP_0 0x95 macro
H A Dsmu_7_0_1_d.h95 #define mmSMC_RESP_0 0x95 macro
H A Dsmu_7_1_1_d.h94 #define mmSMC_RESP_0 0x95 macro
/netbsd-current/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_smu7_smumgr.c184 cgs_write_register(hwmgr->device, mmSMC_RESP_0, 0);
H A Damdgpu_ci_smumgr.c217 cgs_write_register(hwmgr->device, mmSMC_RESP_0, 0);

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